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參數(shù)資料
| 型號： | AM79C978 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| 中文描述： | 單芯片的1 / 10 Mbps的家庭網(wǎng)絡(luò)控制器的PCI |
| 文件頁數(shù)： | 99/261頁 |
| 文件大?。?/td> | 3803K |
| 代理商： | AM79C978 |
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Am79C978
99
In the Link Pass state, receive activity which passes
the pulse width/amplitude requirements of the RX± in-
puts will cause the PCS Control block to assert Carrier
Sense (CRS) signal at the internal MII interface. A col-
lision would cause the PCS Control block to assert Car-
rier Sense (CRS) and Collision (COL) signals at the
internal MII. In the Link Fail state, this block would
cause the PCS Control block to de-assert Carrier
Sense (CRS) and Collision (COL).
In jabber detect mode, this block would cause the PCS
Control block to assert the COL signal at the internal
MII and allow the PCS Control block to assert or de-as-
sert the CRS pin to indicate the current state of the RX±
pair. If there is no receive activity on RX±, this block
would cause the PCS Control block to assert only the
COL pin at the internal MII. If there is RX± activity, this
block would cause the PCS Control block to assert
both COL and CRS at the internal MII.
Collision Detect Function
Simultaneous activity (presence of valid data signals)
from both the internal encoder transmit function and
the twisted pair RX± pins constitutes a collision,
thereby causing the PCS Control block to assert the
COL pin at the internal MII.
Jabber Function
The Jabber function inhibits the 10BASE-T twisted pair
transmit function of the Am79C978 device if the TX±
circuits are active for an excessive period (20-150 ms).
This prevents one port from disrupting the network due
to a
stuck-on
or faulty transmitter condition. If the max-
imum transmit time is exceeded, the data path through
the 10BASE-T transmitter circuitry is disabled (al-
though Link Test pulses will continue to be sent). The
PCS Control block also asserts the COL signal at the
internal MII and sets the Jabber Detect bit in Register 1
of the active PHY. Once the internal transmit data
stream from the Manchester Encoder/Decoder stops,
an
unjab
time of 250-750 ms will elapse before this
block causes the PCS Control block to de-assert the
COL indication and re-enable the transmit circuitry.
When jabber is detected, this block will cause the PCS
Control block to assert the COL signal and allow the
PCS Control block to assert or de-assert the CRS sig-
nal to indicate the current state of the RX± pair. If there
is no receive activity on RX±, this block causes the
PCS Control block to assert only the COL signal at the
internal MII. If there is RX± activity, this block will cause
the PCS Control block to assert both COL and CRS on
the internal MII.
Reverse Polarity Detect
The polarity for 10BASE-T signals is set by reception of
Normal Link Pulses (NLP) or packets. Polarity is
locked, however, by incoming packets only. The first
NLP received when trying to bring the link up will be ig-
nored, but it will set the polarity to the correct state. The
reception of two consecutive packets will cause the po-
larity to be locked, based on the polarity of the ETD. In
order to change the polarity once it has been locked,
the link must be brought down and back up again.
Auto-Negotiation
The object of the Auto-Negotiation function is to deter-
mine the abilities of the devices sharing a link. After ex-
changing abilities, the Am79C978 device and remote
link partner device acknowledge each other and make
a choice of which advertised abilities to support. The
Auto-Negotiation function facilitates an ordered resolu-
tion between exchanged abilities. This exchange al-
lows both devices at either end of the link to take
maximum advantage of their respective shared abili-
ties.
The Am79C978 device implements the transmit and
receive Auto-Negotiation algorithm as defined in IEEE
802.3u, Section 28. The Auto-Negotiation algorithm
uses a burst of link pulses called Fast Link Pulses
(FLPs). The burst of link pulses are spaced between 55
and 140 μs so as to be ignored by the standard
10BASE-T algorithm. The FLP burst conveys informa-
tion about the abilities of the sending device. The re-
ceiver can accept and decode an FLP burst to learn the
abilities of the sending device. The link pulses transmit-
ted conform to the standard 10BASE-T template. The
device can perform auto-negotiation with reverse po-
larity link pulses.
The Am79C978 device uses the Auto-Negotiation al-
gorithm to select the type connection to be established
according to the following priority: 10BASE-T full du-
plex, then 10BASE-T half-duplex. See Table 29.
The Auto-Negotiation algorithm is initiated by the fol-
lowing events: Auto-Negotiation enable bit is set, hard-
ware reset, soft reset, transition to link fail state (when
Auto-Negotiation enable bit is set), or Auto-Negotiation
restart bit is set. The result of the Auto-Negotiation pro-
cess can be read from the status register (Summary
Status Register, TBR24).
By default, the link partner must be at least 10BASE-T
half-duplex capable. The Am79C978 controller can au-
tomatically negotiate with the network and yield the
highest performance possible without software sup-
port. See the
Network Port Manager
section for more
details.
Table 29.
Auto-Negotiation Capabilities
Network Speed
Physical Network Type
20 Mbps
10BASE-T, Full Duplex
10 Mbps
10BASE-T, Half Duplex
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| AM79C981JC | Integrated Multiport Repeater Plus⑩ (IMR+⑩) |
| AM79C982 | basic Integrated Multiport Repeater (bIMR) |
| AM79C982-4JC | basic Integrated Multiport Repeater (bIMR) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C978A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978AKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C978AKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C978AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
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