參數(shù)資料
型號: AM42DL6404G
英文描述: 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 4 Mbit (256 K x 16-Bit) Static RAM (Preliminary)
中文描述: 64兆位(8米× 8位/ 4米× 16位)CMOS和4兆位(256畝× 16位),靜態(tài)存儲器(初步)
文件頁數(shù): 51/60頁
文件大小: 956K
代理商: AM42DL6404G
50
Am42DL16x2D
March 4, 2002
P R E L I M I N A R Y
AC CHARACTERISTICS
t
GHEL
t
WS
OE#
CE#f
WE#
RESET#
t
DS
Data
t
AH
Addresses
t
DH
t
CP
DQ7#
D
OUT
t
WC
t
AS
t
CPH
PA
Data# Polling
A0 for program
55 for erase
t
RH
t
WHWH1 or 2
RY/BY#
t
WH
PD for program
30 for sector erase
10 for chip erase
555 for program
2AA for erase
PA for program
SADD for sector erase
555 for chip erase
t
BUSY
Notes:
1. Figure indicates last two bus cycles of a program or erase operation.
2. PA = program address, SA = sector address, PD = program data.
3. DQ7# is the complement of the data written to the device. D
OUT
is the data written to the device.
4. Waveforms are for the word mode.
Figure 27.
Flash Alternate CE#f Controlled Write (Erase/Program) Operation Timings
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