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參數(shù)資料
| 型號： | AK4665AEN |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, 0.50 MM PITCH, LEAD FREE, QFN-32 |
| 文件頁數(shù)： | 6/52頁 |
| 文件大?。?/td> | 522K |
| 代理商： | AK4665AEN |
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ASAHI KASEI
[AK4665A]
MS0440-E-01
2006/05
- 14 -
For low sampling rates, outband noise causes S/N to degrade. S/N is improved by setting DFS bit to “1”. Table 3 shows
S/N of DAC output for both HP-Amp and Stereo-Lineout. When DFS bit is “1”, MCLK needs 512fs.
S/N (fs=8kHz, BW=20kHz, A-weighted)
DFS
fs
MCLK
HP-amp
Lineout
0
8kHz
48kHz
256fs/512fs
84dB
Default
1
8kHz
24kHz
512fs
90dB
88dB
Table 3. Relationship among fs, MCLK frequency and S/N of HP-amp and Lineout
Serial Data Interface
The AK4665A interfaces with external systems via the BICK, LRCK, SDTO and SDTI pins. Four data formats are
available and are selected by setting DIF1-0 bits (Table 4). Mode 0 of SDTI is compatible with existing 16bit DAC and
digital filters. Mode 1 of SDTI is a 20bit version of Mode 0. Mode 2 of SDTI is similar to AKM ADCs and many DSP
serial ports. Mode 3 is compatible with the I
2S serial data protocol. In SDTI Modes 2 and 3, the following formats are also
valid: 16-bit data followed by four zeros and 18-bit data followed by two zeros. In all modes, the serial data is MSB first
and 2’s complement format.
Mode
DIF1
DIF0
SDTO
SDTI
BICK
LRCK
0
20bit, MSB justified
16bit, LSB justified
≥ 32fs
H/L
1
0
1
20bit, MSB justified
20bit, LSB justified
≥ 40fs
H/L
2
1
0
20bit, MSB justified
≥ 40fs
H/L
Default
3
1
IIS (I
2S)
IIS (I
2S)
≥ 40fs
L/H
Table 4. Audio Data Format
LRCK
BICK(64fs)
SDTO(o)
0
1
2
16
17
18
20
21
31
0
1
2
31
0
19
1
18
0
19
18
19
SDTI(i)
1
14
0
15
12
11
1
0
Lch Data
Rch Data
Don’t Care
4
3
2
1
13
16
17
18
14
15
1
13
20
21
12
11
4
3
2
0
BICK(32fs)
SDTI(i)
0
1
2
8
9
10
15
0
1
2
0
15
1
14
7
8
12
11
14
6
5
4
13
3
2
1
0
8
9
10
15
7
8
12
11
14
6
5
4
13
3
2
1
0
15
14
15
SDTO(o)
19
18
11
12
10
9
8
7
6
5
4
19
18
11
12
10
9
8
7
6
5
4
19
Figure 8. Mode 0 Timing
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