參數(shù)資料
型號(hào)： AK4665AEN
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, QCC32
封裝： 5 X 5 MM, 0.50 MM PITCH, LEAD FREE, QFN-32
文件頁(yè)數(shù)： 31/52頁(yè)
文件大?。?/td> 522K
代理商： AK4665AEN
ASAHI KASEI
[AK4665A]
MS0440-E-01
2006/05
- 37 -
3) DAC
→ HP-Amp
Power Supply
PDN pin
PMVCM bit
Clock Input
(5)
SDTI pin
PMDAC bit
DAC Internal
State
PD
Normal Operation
HPL/R pins
PMHPL/R bits
(7)
ATTL/R7-0 bits
00H(MUTE)
FFH(0dB)
(9) GD
(10) 1061/fs
PD
00H(MUTE)
(9) (10)
Don’t care
HPMTN bit
(1)
>150ns
(3) >0
FS3-0, DFS bits
XH, X
0H, 0
PUT1-0 bits
PTS1-0 bits
XX, XX
00, 00
PMCP bit
(6) >0
DACHL bit
DACHR bit
(4) >0
NVSS pin
0V
HVDD
0V
(8)
(12) (13)
Don’t care
HP-Amp State
PD
Normal Operation
PD
MT
(2) >0
(14)
(11)
Figure 23. Power-up/down Sequence of DAC and HP-Amp
(1) PDN pin should be set to “H” at least 150ns after the power is supplied.
(2) FS3-0, DFS, PUT1-0 and PTS1-0 bits should be set after PDN pin goes to “H”.
(3) PMVCM bit should be changed to “1” after FS3-0, DFS, PUT1-0 and PTS1-0 bits are set.
(4) DACHL and DACHR bits should be changed to “1” after PMVCM bit is changed to “1”. Each path is switched-on
during the transition time set by FS3-0 and PTS1-0 bits.
(5) External clocks (MCLK, BICK and LRCK) are needed to operate the charge pump circuit, HP-Amp or DAC.
External clocks are also needed for each path (DACHL, LINHL, MINHL, DACHR, RINHR, MINHR and HPMTN
bits) setting.
(6) PMCP, PMDAC, PMHPL and PMHPR bits should be changed to “1” after DACHL and DACHR bits are changed to
“1”. When PMCP bit is changed to “1”, the charge pump circuit is powered-up and NVSS pin goes to
HVDD
voltage according to the setting of FS3-0 and DFS bits
(7) After power-up of the charge pump circuit, HP-Amp is powered-up. Rising time of HP-Amp is determined by FS3-0,
DFS and PUT1-0 bits.
(8) HPMTN bit should be changed to “1” to release the mute after HP-Amp is powered-up. The transition time of mute
release is determined by FS3-0,DFS and PTS1-0 bits.
(9) Digital output corresponding to analog input has the group delay (GD) of 17.5/fs (=397s@fs=44.1kHz).
(10) The transition time for digital volume is set by ATS bit. The initial value is 1061/fs (=24ms@fs=44.1kHz).
(11) HPMTN bit should be changed to “0” to mute HP-Amp.
(12) After the transition time for mute, PMDAC, PMHPL and PMHPR bits should be changed to “0” to power-down of
DAC and HP-Amp.
(13) After power-down of the HP-Amp, PMCP bit should be changed to “0” to power-down the charge pump circuit.
Falling time constant is determined by external capacitor connected with NVSS pin and internal resistance (typ
17.5k
). In case of 2.2F capacitor, time constant is
τ = 2.2F x 17.5k = 38.5ms (typ)
(14) Clocks should be stopped after PMCP bit is changed to “0”.
相關(guān)PDF資料
PDF描述
AK5368192WP-80 8M X 36 FAST PAGE DRAM MODULE, 80 ns, SMA72
AK5385A 24BIT 192KHZ ADC
AK8406A AK8406A
AK8432 6CH 10bit 40MSPS】3
AK8850 NTSC Digital Video Decoder
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4666VQ 功能描述:IC CODEC STEREO 20BIT LQFP 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購(gòu)買時(shí)間 標(biāo)準(zhǔn)包裝:1,000
AK4671 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP-AMP
AK4671_10 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP-AMP
AK4671EG 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP-AMP
AK4673 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*