參數(shù)資料
型號: AK4665AEN
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, QCC32
封裝: 5 X 5 MM, 0.50 MM PITCH, LEAD FREE, QFN-32
文件頁數(shù): 14/52頁
文件大?。?/td> 522K
代理商: AK4665AEN
ASAHI KASEI
[AK4665A]
MS0440-E-01
2006/05
- 21 -
3.
Example for ALC1 Operation
Table 15 shows the examples of the ALC1 setting.
fs
Register Name
Comment
Data
8kHz
16kHz
32kHz
11.025kHz
22.05kHz
44.1kHz
12kHz
24kHz
48kHz
LMTH
Limiter detection Level
00
4.1dBFS
ZELMN
Limiter zero crossing detection
0
Enable
ZTM1-0
Zero crossing timeout period
00
8ms
8.7ms
8ms
WTM1-0
Recovery waiting period
*WTM1-0 bits should be the same data
as ZTM1-0 bits
00
8ms
8.7ms
8ms
REF7-0
Maximum gain at recovery operation
E1H
+30dB
IVOL7-0
Gain of IVOL
91H
0dB
LMAT1-0
Limiter ATT step
00
0.375dB
RGAIN1-0
Recovery GAIN step
00
0.375dB
ALC1
ALC1 enable
1
Enable
Table 15. Example for the ALC1 setting
The following registers should not be changed during the ALC1 operation. These bits should be changed after the ALC1
operation is finished by ALC1 bit = “0” or PMADC bit = “0”.
- LMTH, LMAT1-0, WTM1-0, ZTM1-0, RGAIN1-0, REF7-0, ZELMN
Manual Mode
* The value of IVOL should be
the same or smaller than REF’s
WR (ZTM1-0, WTM1-0)
WR (REF7-0)
WR (IVOL7-0)
WR (LMAT1-0, RGAIN1-0, ZELMN, LMTH1-0; ALC1= “1”)
Example:
Limiter = Zero crossing Enable
Recovery Cycle = 8ms@8kHz
Limiter and Recovery Step = 1
Maximum Gain = +30.0dB
Limiter Detection Level =
4.1dBFS
ALC1 bit = “1”
(1) Addr=05H, Data=91H
(2) Addr=02H, Data=00H
(3) Addr=04H, Data=E1H
ALC1 Operation
(4) Addr=03H, Data=20H
Note : WR : Write
Figure 13. Registers set-up sequence at ALC1 operation
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