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參數(shù)資料
| 型號： | ADV7330 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 11-Bit Triple DAC Video Encoder |
| 中文描述： | 多格式11位DAC的視頻編碼器三 |
| 文件頁數(shù)： | 50/76頁 |
| 文件大?。?/td> | 1378K |
| 代理商： | ADV7330 |
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REV. B
–50–
ADV7330
BOARD DESIGN AND LAYOUT CONSIDERATIONS
DAC Termination and Layout Considerations
The ADV7330 contains an on-board voltage reference. The V
REF
pin is normally terminated to V
AA
through a 0.1
μ
F capacitor
when the internal V
REF
is used. Alternatively, the ADV7330 can
be used with an external V
REF
(AD1580).
The RSET resistors connected between the R
SET
pin and AGND
are used to control the full-scale output current and therefore
the DAC voltage output levels. For full-scale output, R
SET
must
have a value of 3040
. The R
SET
values should not be changed.
R
LOAD
has a value of 300
for full-scale output.
VIDEO OUTPUT BUFFER AND OPTIONAL
OUTPUT FILTER
Output buffering on all three DACs is necessary in order to
drive output devices, such as SD or HD monitors.
Analog Devices produces a range of suitable op amps for this
application, such as the AD8061. More information on line
driver buffering circuits is given in the relevant op amp data sheets.
An optional analog reconstruction low-pass filter (LPF) may be
required as an anti-imaging filter if the ADV7330 is connected
to a device that requires this filtering.
The filter specifications vary with the application.
Table XV. External Filter Requirements
Cutoff
Frequency Attenuation
(MHz)
Application
Oversampling
2
×
16
×
1
×
8
×
1
×
2
×
–50 dB @ (MHz)
SD
SD
PS
PS
HDTV
HDTV
>6.5
>6.5
>12.5
>12.5
>30
>30
20.5
209.5
14.5
203.5
44.25
118.5
Table XVI shows possible output rates from the ADV7330.
Table XVI.
Input Mode
Address 01h, Bit 6–4
PLL
Address 00h, Bit 1 Rate
Output
SD
Off
On
27 MHz (2
×
)
216 MHz (16
×
)
27 MHz (1
×
)
216 MHz (8
×
)
74.25 MHz (1
×
)
148.5 MHz (2
×
)
PS
Off
On
HDTV
Off
On
560
600
3
4
1
22pF
600
DAC
OUTPUT
75
BNC
OUTPUT
10 H
560
Figure 46. Example for Output Filter for SD,
16
×
Oversampling
0
–80
–70
–60
–50
–40
–30
–20
–10
0
–30
–60
–90
–120
–150
–180
–210
–240
1G
1M
10M
100M
G
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
GROUP DELAY (sec)
PHASE (Deg)
MAGNITUDE (dB)
21n
18n
15n
12n
9n
6n
3n
0
24n
Figure 47. Filter Plot for Output Filter for SD,
16
×
Oversampling
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