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參數(shù)資料
| 型號： | ADV7173KSTZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 58/60頁 |
| 文件大小： | 0K |
| 描述： | IC DAC VIDEO NTSC 6-CH 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 多媒體 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
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REV. B
ADV7172/ADV7173
–7–
3.3 V TIMING SPECIFICATIONS
(VAA = 3.0 V–3.6 V
1, V
REF = 1.235 V, RSET1,2 = 600
. All specifications TMIN to TMAX
2 unless
otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
MPU PORT
3, 4
SCLOCK Frequency
0
400
kHz
SCLOCK High Pulsewidth, t1
0.6
s
SCLOCK Low Pulsewidth, t2
1.3
s
Hold Time (Start Condition), t3
After this period the 1st clock is generated
0.6
s
Setup Time (Start Condition), t4
relevant for repeated Start Condition.
0.6
s
Data Setup Time, t5
100
ns
SDATA, SCLOCK Rise Time, t6
300
ns
SDATA, SCLOCK Fall Time, t7
300
ns
Setup Time (Stop Condition), t8
0.6
s
ANALOG OUTPUTS
3, 5
Analog Output Delay
7ns
DAC Analog Output Skew
0
ns
CLOCK CONTROL AND
PIXEL PORT
4, 5, 6
fCLOCK
27
MHz
Clock High Time, t9
8ns
Clock Low Time, t10
8ns
Data Setup Time, t11
4.0
ns
Data Hold Time, t12
5ns
Control Setup Time, t11
5ns
Control Hold Time, t12
3ns
Digital Output Access Time, t13
20
ns
Digital Output Hold Time, t14
12
ns
Pipeline Delay, t15
37
Clock Cycles
TELETEXT PORT
3, 4, 7
Digital Output Access Time, t16
23
ns
Data Setup Time, t17
2ns
Data Hold Time, t18
6ns
RESET CONTROL
3, 4
RESET Low Time
3ns
NOTES
1The max/min specifications are guaranteed over this range. The max/min values are typical over 3.0 V to 3.6 V.
2Temperature range T
MIN to TMAX: 0
°C to 70°C.
3TTL input values are 0 to 3 volts, with input rise/fall times
≤ 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and
outputs. Analog output load
≤ 10 pF.
4Guaranteed by characterization.
5Output delay measured from the 50% point of the rising edge of CLOCK to the 50% point of full-scale transition.
6Pixel Port consists of the following:
Pixel Inputs:
P7–P0
Pixel Controls:
HSYNC, FIELD/VSYNC, BLANK, VSO, CSO_HSO, CLAMP
Clock Input:
CLOCK
7Teletext Port consists of the following:
Teletext Output:
TTXREQ
Teletext Input:
TTX
Specifications subject to change without notice.
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