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參數(shù)資料
| 型號(hào)： | ADV212BBCZRL-150 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | JPEG 2000 Video Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA144 |
| 封裝： | 13 X 13 MM, LEAD FREE, MO-192AAD-1, CSPBGA-144 |
| 文件頁數(shù)： | 32/44頁 |
| 文件大?。?/td> | 374K |
| 代理商： | ADV212BBCZRL-150 |
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ADV212
VIDEO INPUT FORMATS
The ADV212 supports a wide variety of formats for
uncompressed video and still image data. The actual interface
and bus modes selected for transferring uncompressed data
dictates the allowed size of the input data and the number of
samples transferred with each access.
The host interface can support 8-/10-/12-/14-/16-bit data
formats. The video interface can support video data or still
image data input/output. Supported formats are 8-/10-/12-bit
Rev. 0 | Page 32 of 44
YCbCr formats or single component format. See the
ADV212
User’s Guide
for details. All formats can support less precision
than provided by specifying the actual data width/precision in
the PMODE register.
The maximum allowable data input rate is limited by using
irreversible or reversible compression modes and the data width
(or precision) of the input samples. Refer to Table 23 and
Table 25 to determine the maximum data input rate.
Table 23. Maximum Pixel Data Input Rates (144-Ball Package)
Interface
HDATA
VDATA
1
Input rate limits for HDATA might be less for certain applications depending on input picture size and content, host interface settings, and DMA transfer settings.
2
Minimum guaranteed sustained output rate or minimum sustainable compression rate [input rate/minimum peak output rate].
3
Maximum peak output rate; an output rate above this value is not possible.
Compression Mode
Irreversible
Irreversible
Irreversible
Irreversible
Reversible
Reversible
Reversible
Reversible
Irreversible
Irreversible
Irreversible
Reversible
Reversible
Reversible
Input Format
8-bit data
10-bit data
12-bit data
16-bit data
8-bit data
10-bit data
12-bit data
14-bit data
8-bit data
10-bit data
12-bit data
8-bit data
10-bit data
12-bit data
Input Rate Limit
Active Resolution
(MSPS)
1
45
45
45
45
40
32
27
23
65
65
65
40
32
27
Approx Min Output Rate,
Compressed Data
2
(Mbps)
130
130
130
130
130
130
130
130
130
130
130
130
130
130
Approx Max Output Rate,
Compressed Data
3
(Mbps)
200
200
200
200
200
200
200
200
200
200
200
200
200
200
Table 24. Maximum Pixel Data Input Rates (121-Ball Package)
Interface
HDATA
VDATA
1
Input rate limits for HDATA might be less for certain applications depending on input picture size and content, host interface settings, and DMA transfer settings.
2
Minimum guaranteed sustained output rate or minimum sustainable compression rate [input rate/minimum peak output rate].
3
Maximum peak output rate; an output rate above this value is not possible.
Compression Mode
Irreversible
Irreversible
Irreversible
Irreversible
Reversible
Reversible
Reversible
Reversible
Irreversible
Irreversible
Irreversible
Reversible
Reversible
Reversible
Input Format
8-bit data
10-bit data
12-bit data
16-bit data
8-bit data
10-bit data
12-bit data
14-bit data
8-bit data
10-bit data
12-bit data
8-bit data
10-bit data
12-bit data
Input Rate Limit
Active Resolution
(MSPS)
1
34
34
34
34
30
24
20
17
48
48
48
30
24
20
Approx Min Output Rate,
Compressed Data
2
(Mbps)
98
98
98
98
98
98
98
98
98
98
98
98
98
98
Approx Max Output Rate,
Compressed Data
3
(Mbps)
150
150
150
150
150
150
150
150
150
150
150
150
150
150
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV212-HD-EB | 功能描述:BOARD EVALUATION FOR ADV212-HD RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| ADV212XBCZ-150 | 制造商:Analog Devices 功能描述:JPEG2000 VIDEO CODEC - Bulk |
| ADV216BBCZ | 制造商:Analog Devices 功能描述:- Trays |
| ADV226KBCZ | 制造商:Analog Devices 功能描述: |
| ADV226KBCZRL | 制造商:Analog Devices 功能描述: |
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