- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11199 > ADUC847BSZ8-5 (Analog Devices Inc)IC MCU FLASH W/24BIT ADC 52MQFP PDF資料下載
參數(shù)資料
| 型號： | ADUC847BSZ8-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH W/24BIT ADC 52MQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 12.58MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x24b; D/A 1x12b，2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 托盤 |
| 配用： | EVAL-ADUC847QSZ-ND - KIT DEV QUICK START FOR ADUC847 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁
Data Sheet
ADuC845/ADuC847/ADuC848
Rev. C | Page 23 of 108
11
10
01
00
07H
0FH
17H
1FH
2FH
7FH
00H
08H
10H
18H
20H
RESET VALUE OF
STACK POINTER
30H
FOUR BANKS OF EIGHT
REGISTERS
R0 TO R7
BIT-ADDRESSABLE
(BIT ADDRESSES)
GENERAL-PURPOSE
AREA
BANKS
SELECTED
VIA
BITS IN PSW
04741-008
Figure 8. Lower 128 Bytes of Internal Data Memory
Internal XRAM
The ADuC845, ADuC847, and ADuC848 contain 2 kbytes of
on-chip extended data memory. This memory, although on-
chip, is accessed via the MOVX instruction. The 2 kbytes of
internal XRAM are mapped into the bottom 2 kbytes of the
external address space if the CFG84x.0 (Table 7) bit is set;
otherwise, access to the external data memory occurs just like a
standard 8051.
Even with the CFG84x.0 bit set, access to the external (off chip),
XRAM occurs once the 24-bit DPTR is greater than 0007FFH.
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
FFFFFFH
CFG845/7/8.0 = 0
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
FFFFFFH
CFG845/7/8.0 = 1
0007FFH
000800H
2 kBYTES
ON-CHIP
XRAM
04741-009
Figure 9. Internal and External XRAM
When enabled and when accessing the internal XRAM, the P0
and P2 port pin operations, as well as the RD and WR strobes,
do not operate as a standard 8051 MOVX instruction. This
allows the user to use these port pins as standard I/O. The
internal XRAM can be configured as part of the extended 11-bit
stack pointer. By default, the stack operates exactly like an 8052
in that it rolls over from FFH to 00H in the general-purpose
RAM. On the ADuC845, ADuC847, and ADuC848, however, it
is possible (by setting CFG845.7/ADuC847.7/ADuC848.7) to
enable the 11-bit extended stack pointer. In this case, the stack
rolls over from FFH in RAM to 0100H in XRAM.
The 11-bit stack pointer is visible in the SPH and SP SFRs. The
SP SFR is located at 81H as with a standard 8052. The SPH SFR
is located at B7H. The 3 LSBs of the SPH SFR contain the 3
extra bits necessary to extend the 8-bit stack pointer in the SP
SFR into an 11-bit stack pointer.
UPPER 1792
BYTES OF
ON-CHIP XRAM
(DATA + STACK
FOR EXSP = 1,
DATA ONLY
FOR EXSP = 0)
256 BYTES OF
ON-CHIP DATA
RAM
(DATA +
STACK)
LOWER 256
BYTES OF
ON-CHIP XRAM
(DATA ONLY)
00H
FFH
00H
07FFH
CFG845/7/8.7 = 0
100H
04741-010
CFG845/7/8.7 = 1
Figure 10. Extended Stack Pointer Operation
External Data Memory (External XRAM)
There is no support for external program memory access to the
parts. However, just like a standard 8051-compatible core, the
ADuC845/ADuC847/ADuC848 can access external data
memory using a MOVX instruction. The MOVX instruction
automatically outputs the various control strobes required to
access the data memory. The parts, however, can access up to
16 Mbytes of external data memory. This is an enhancement of
the 64 kbytes of external data memory space available on a
standard 8051-compatible core. See the Hardware Design
Considerations section for details.
When accessing external RAM, the EWAIT register might need
to be programmed to give extra machine cycles to the MOVX
operation. This is to account for differing external RAM access
speeds.
EWAIT SFR
SFR Address:
9FH
Power-On Default:
00H
Bit Addressable:
No
This special function register (SFR), when programmed,
dictates the number of wait states for the MOVX instruction.
The value can vary between 0H and 7H. The MOVX instruc-
tion increases by one machine cycle (4 + n, where n = EWAIT
number in decimal) for every increase in the EWAIT value.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT91SAM7SE512-CU-999 | IC MCU ARM7 512KB FLASH 144LFBGA |
| NLVAS4599DTT1G | IC SWITCH SPDT 6TSOP |
| ADUC843BCP62Z-5 | IC MCU FLASH 12BIT ADC 56LFCSP |
| ADUC816BSZ-REEL | IC MCU FLASH 16BIT ADC 52MQFP |
| NLVAS4599DFT2G | IC SWITCH SPDT SC88 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC848 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BCP32-3 | 制造商:Analog Devices 功能描述:10 CHANNEL 16 BIT ADC + FLASH 8 BIT UP - Trays |
| ADUC848BCP32-5 | 制造商:Analog Devices 功能描述:10 CHANNEL 16 BIT ADC + FLASH 8 BIT UP - Trays |
| ADUC848BCP62-3 | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 56-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 12.85MHZ 3.3V 56LFCSP - Bulk |
| ADUC848BCP62-5 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 56-Pin LFCSP EP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。