參數(shù)資料
型號： ADUC847BSZ8-5
廠商： Analog Devices Inc
文件頁數(shù)： 19/108頁
文件大?。?/td> 0K
描述： IC MCU FLASH W/24BIT ADC 52MQFP
標準包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 12.58MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲器容量： 8KB（8K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x24b; D/A 1x12b，2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 52-QFP
包裝： 托盤
配用： EVAL-ADUC847QSZ-ND - KIT DEV QUICK START FOR ADUC847
ADuC845/ADuC847/ADuC848
Data Sheet
Rev. C | Page 18 of 108
WATCHDOG
TIMER
2304 BYTES
USER RAM
POWER SUPPLY
MONITOR
200
A
200
A
BAND GAP
REFERENCE
VREF
DETECT
AV
DD
AGND
DV
DD
DGND
RESET
POR
MOSI
MISO
SS
XTAL1
ADuC848
ADC
CONTROL
AND
CALIBRATION
DAC
CONTROL
12-BIT
VOLTAGE
OUTPUT DAC
T0
T1
T2EX
T2
INT0
INT1
EA
PSEN
ALE
SINGLE-PIN
EMULATOR
TxD
RxD
4 kBYTES DATA/
FLASH/EE
62 kBYTES PROGRAM/
FLASH/EE
UART
SERIAL PORT
CURRENT
SOURCE
MIX
SINGLE-
CYCLE
8052
MCU
CORE
DOWNLOADER
DEBUGGER
SPI SERIAL
INTERFACE
16-BIT
COUNTER
TIMERS
WAKE-UP/
RTC TIMER
PLL WITH PROG.
CLOCK DIVIDER
XTAL2
OSC
2
× DATA POINTERS
11-BIT STACK POINTER
AIN
MUX
AIN1
AIN2
MUX
PWM0
PWM1
PWM
CONTROL
UART
TIMER
SCLK
SDATA
I2C SERIAL
INTERFACE
04741-072
PGA
BUF
56
4
36
51
23 37 38 50
18
17
19
44
43
45
30
31
32
33
28
29
34
35
21
20
39
33
25
24
41
PWMCLK
42
40
14
5
6
22
1
AIN3
2
AIN4
3
AIN5
9
AIN6 10
AIN7 11
AIN8 12
P0.0
(AD0)
P0.1
(AD1)
46
47
P0.2
(AD2)
48
P0.3
(AD3)
49
P0.4
(AD4)
52
P0.5
(AD5)
53
P0.6
(AD6)
54
P0.7
(AD7)
55
P3.0
(RxD)
P3.1
(TxD)
18
19
P3.2
(INT0)
20
P3.3
(INT1)
21
P3.4
(T0)
24
P3.5
(T1)
25
P3.6
(WR)
26
P3.7
(RD)
27
P1.0/AIN1
P1.1/AIN2
56
1
P1.2/AIN3/REFIN2+
2
P1.3/AIN4/REFIN2
–
3
P1.4/AIN5
9
P1.5/AIN6
10
P1.6/AIN7/IEXC1
11
P1.7/AIN8/IEXC2
12
P2.0/SCLK
(A8/A16)
P2.1/MOSI
(A9/A17)
30
31
P2.2/MISO
(A10/A18)
32
P2.3/SS/T2
(A11/A19)
33
P2.4/T2EX
(A12/A20)
39
P2.5/PWM0
(A13/A21)
40
P2.6/PWM1
(A14/A22)
41
P2.7/PWMCLK
(A15/A23)
42
AIN9 15
AIN10 16
AINCOM/DAC 13
DUAL
16-BIT
S-D DAC
DUAL
16-BIT
PWM
REFIN+
8
REFIN–
7
IEXC1 11
IEXC2 12
PRIMARY ADC
16-BIT
S-D ADC
NOTES
1. THE PIN NUMBERS REFER TO THE LFCSP PACKAGE ONLY.
Figure 6. Detailed Block Diagram of the ADuC848
8052 INSTRUCTION SET
Table 4 documents the number of clock cycles required for each
instruction. Most instructions are executed in one or two clock
cycles resulting in 12.58 MIPs peak performance when operating
at PLLCON = 00H.
TIMER OPERATION
Timers on a standard 8052 increment by one with each machine
cycle. On the ADuC845, ADuC847, and ADuC848, one
machine cycle is equal to one clock cycle; therefore, the timers
increment at the same rate as the core clock.
ALE
On the ADuC834, the output on the ALE pin is a clock at 1/6th
of the core operating frequency. On the ADuC845, ADuC847,
and ADuC848, the ALE pin operates as follows. For a single
machine cycle instruction, ALE is high for the entire machine
cycle. For a two or more machine cycle instruction, ALE is high
for the first machine cycle and then low for the remainder of the
machine cycles.
EXTERNAL MEMORY ACCESS
The ADuC845, ADuC847, and ADuC848 do not support
external program memory access, but the parts can access up to
16 MB (24 address bits) of external data memory. When
accessing external RAM, the EWAIT register might need to be
programmed in order to give extra machine cycles to MOVX
commands to allow for differing external RAM access speeds.
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