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參數(shù)資料
| 型號： | ADUC841BSZ62-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC/DAC 12BIT W/MCU 52-MQFP |
| 產(chǎn)品培訓模塊： | Process Control |
| 標準包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | DMA，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 738 (CN2011-ZH PDF) |
| 配用： | EVAL-ADUC841QSZ-ND - KIT DEV FOR ADUC841 QUICK START |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 34 of 88
USING FLASH/EE DATA MEMORY
The 4 kBytes of Flash/EE data memory are configured as 1024
pages, each of 4 bytes. As with the other ADuC841/ADuC842/
ADuC843 peripherals, the interface to this memory space is via
a group of registers mapped in the SFR space. A group of four
data registers (EDATA1–4) is used to hold the four bytes of data
at each page. The page is addressed via the two registers, EADRH
and EADRL. Finally, ECON is an 8-bit control register that may
be written with one of nine Flash/EE memory access commands
to trigger various read, write, erase, and verify functions. A block
diagram of the SFR interface to the Flash/EE data memory array
is shown in Figure 41.
ECON—Flash/EE Memory Control SFR
Programming of either Flash/EE data memory or Flash/ EE
program memory is done through the Flash/EE memory
control SFR (ECON). This SFR allows the user to read, write,
erase, or verify the 4 kBytes of Flash/EE data memory or the
56 kBytes of Flash/EE program memory.
BYTE 1
(0000H)
E
DATA1
S
F
R
BYTE 1
(0004H)
BYTE 1
(0008H)
BYTE 1
(000CH)
BYTE 1
(0FF8H)
BYTE 1
(0FFCH)
BYTE 2
(0001H)
E
DATA2
S
F
R
BYTE 2
(0005H)
BYTE 2
(0009H)
BYTE 2
(000DH)
BYTE 2
(0FF9H)
BYTE 2
(0FFDH)
BYTE 3
(0002H)
E
DATA3
S
F
R
BYTE 3
(0006H)
BYTE 3
(000AH)
BYTE 3
(000EH)
BYTE 3
(0FFAH)
BYTE 3
(0FFEH)
BYTE 4
(0003H)
E
DATA4
S
F
R
BYTE 4
(0007H)
BYTE 4
(000BH)
BYTE 4
(000FH)
BYTE 4
(0FFBH)
(0FFFH)
01H
00H
02H
03H
3FEH
3FFH
P
A
GE
ADDRE
S
(EADRH/L)
BYTE
ADDRESSES
ARE GIVEN IN
BRACKETS
03260-0-040
BYTE 4
Figure 41. Flash/EE Data Memory Control and Configuration
Table 12. ECON—Flash/EE Memory Commands
ECON VALUE
Command Description (Normal Mode)
(Power-On Default)
Command Description (ULOAD Mode)
01H
READ
Results in 4 bytes in the Flash/EE data memory, addressed
by the page address EADRH/L, being read into EDATA1–4.
Not implemented. Use the MOVC instruction.
02H
WRITE
Results in 4 bytes in EDATA1–4 being written to the
Flash/EE data memory at the page address given by
EADRH/L (0 – EADRH/L < 0400H).
Note that the 4 bytes in the page being addressed must
be pre-erased.
Results in bytes 0–255 of internal XRAM being written to
the 256 bytes of Flash/EE program memory at the page
address given by EADRH (0 – EADRH < E0H).
Note that the 256 bytes in the page being addressed must
be pre-erased.
03H
Reserved.
04H
VERIFY
Verifies that the data in EDATA1–4 is contained in the
page address given by EADRH/L. A subsequent read of the
ECON SFR results in 0 being read if the verification is valid,
or a nonzero value being read to indicate an invalid
verification.
Not implemented. Use the MOVC and MOVX instructions
to verify the write in software.
05H
ERASE PAGE
Results in erasing the 4-byte page of Flash/EE data
memory addressed by the page address EADRH/L.
Results in the 64 byte page of Flash/EE program memory,
addressed by the byte address EADRH/L, being erased.
EADRL can equal any of 64 locations within the page. A
new page starts whenever EADRL is equal to 00H, 40H,
80H, or C0H.
06H
ERASE ALL
Results in erasing the entire 4 kBytes of Flash/EE data
memory.
Results in erasing the entire 56 kBytes of ULOAD Flash/EE
program memory.
81H
READBYTE
Results in the byte in the Flash/EE data memory,
addressed by the byte address EADRH/L, being read into
EDATA1 (0 – EADRH / L – 0FFFH).
Not implemented. Use the MOVC command.
82H
WRITEBYTE
Results in the byte in EDATA1 being written into Flash/EE
data memory at the byte address EADRH/L
Results in the byte in EDATA1 being written into Flash/EE
program memory at the byte address EADRH/L (0 –
EADRH/L – DFFFH).
0FH
EXULOAD
Leaves the ECON instructions to operate on the Flash/EE
data memory.
Enters normal mode directing subsequent ECON
instructions to operate on the Flash/EE data memory.
F0H
ULOAD
Enters ULOAD mode, directing subsequent ECON
instructions to operate on the Flash/EE program memory.
Leaves the ECON instructions to operate on the Flash/EE
program memory.
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參數(shù)描述 |
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| ADUC841BSZ62-5 | 制造商:Analog Devices 功能描述:8-Bit Microcontroller IC |
| ADUC842 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12- Bit ADCs and DACs with Embedded Hi-Speed 62KB FLASH MCU |
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| ADUC842BCP32-3 | 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 16.7MHZ 3.3V 56LFCSP - Bulk 制造商:Analog Devices 功能描述: |
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