參數(shù)資料
型號(hào)： ADUC7036DCPZ-RL
廠商： Analog Devices Inc
文件頁數(shù)： 76/132頁
文件大?。?/td> 0K
描述： IC MCU 96K FLASH DUAL 48LFCSP
標(biāo)準(zhǔn)包裝： 2,500
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲(chǔ)器容量： 96KB（48K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 115°C
封裝/外殼： 48-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC7036
Rev. C | Page 48 of 132
Current Channel ADC Control Register
Name: ADC0CON
Address: 0xFFFF050C
Default Value: 0x0000
Access: Read/write
Function: This 16-bit register is used to configure the I-ADC.
Note that if the current ADC is reconfigured via ADC0CON, the voltage ADC and temperature ADC are also reset.
Table 37. ADC0CON MMR Bit Designations
Bit
Description
15
Current channel ADC enable.
Set to 1 by user code to enable the I-ADC.
Cleared to 0 to power down the I-ADC and reset the respective ADC ready bit in the ADCSTA MMR to 0.
14, 13
IIN current source enable.
00 = current sources off.
01 = enables the 50 μA current source on IIN+.
10 = enables the 50 μA current source on IIN.
11 = enables the 50 μA current source on both IIN and IIN+.
12 to 10
Not used. These bits are reserved for future functionality and should be written as 0.
9
Current channel ADC output coding.
Set to 1 by user code to configure I-ADC output coding as unipolar.
Cleared to 0 by user code to configure I-ADC output coding as twos complement.
8
Not used. This bit is reserved for future functionality and should be written as 0.
7, 6
Current channel ADC input select.
00 = IIN+, IIN are selected.
01 = IIN, IIN are selected. Diagnostic, internal short configuration.
10 = VREF/136, 0 V, diagnostic, test voltage for gain settings ≤ 128. Note that if (REG_AVDD, AGND) divided-by-2 reference is
selected, REG_AVDD is used for VREF in this mode. This leads to ADC0DAT scaled by 2.
11 = not defined.
5, 4
Current channel ADC reference select.
00 = internal, 1.2 V precision reference selected. In ADC low power mode, the voltage reference selection is controlled by
ADCMDE[5].
01 = external reference inputs (VREF, GND_SW) selected.
10 = external reference inputs divided-by-2 (VREF, GND_SW)/2 selected, which allows an external reference up to REG_AVDD.
11 = (REG_AVDD, AGND) divided-by-2 selected.
3 to 0
Current channel ADC gain select. The nominal I-ADC full-scale input voltage = (VREF/gain).
0000 = I-ADC gain of 1.
0001 = I-ADC gain of 2.
0010 = I-ADC gain of 4.
0011 = I-ADC gain of 8.
0100 = I-ADC gain of 16.
0101 = I-ADC gain of 32.
0110 = I-ADC gain of 64.
0111 = I-ADC gain of 128.
1000 = I-ADC gain of 256.
1001 = I-ADC gain of 512.
1xxx = I-ADC gain is undefined.
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