參數(shù)資料
型號(hào): ADUC7036DCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 125/132頁
文件大?。?/td> 0K
描述: IC MCU 96K FLASH DUAL 48LFCSP
標(biāo)準(zhǔn)包裝: 2,500
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設(shè)備: PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲(chǔ)器容量: 96KB(48K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 115°C
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
包裝: 帶卷 (TR)
ADuC7036
Rev. C | Page 92 of 132
GPIO Port0 Set Register
Name: GP0SET
Address: 0xFFFF0D24
Access: Write only
Function: This 32-bit MMR allows user code to individually bit-address external GPIO pins to set them high only. User code can accomplish
this using the GP0SET MMR without having to modify or maintain the status of the GPIO pins (as user code requires when using
GP0DAT).
Table 65. GP0SET MMR Bit Designations
Bit
Description
31 to 21
Reserved. These bits are reserved and should be written as 0 by user code.
20
Port 0.4 set bit.
Set to 1 by user code to set the external GPIO_4 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_4 pin.
19
Port 0.3 set bit.
Set to 1 by user code to set the external GPIO_3 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_3 pin.
18
Port 0.2 set bit.
Set to 1 by user code to set the external GPIO_2 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_2 pin.
17
Port 0.1 set bit.
Set to 1 by user code to set the external GPIO_1 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_1 pin.
16
Port 0.0 set bit.
Set to 1 by user code to set the external GPIO_0 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_0 pin.
15 to 0
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO Port1 Set Register
Name: GP1SET
Address: 0xFFFF0D34
Access: Write only
Function: This 32-bit MMR allows user code to individually bit-address external GPIO pins to set them high only. User code can accomplish
this using the GP1SET MMR without having to modify or maintain the status of the GPIO pins (as user code requires when using
GP1DAT).
Table 66. GP1SET MMR Bit Designations
Bit
Description
31 to 18
Reserved. These bits are reserved and should be written as 0 by user code.
17
Port 1.1 set bit.
Set to 1 by user code to set the external GPIO_6 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_6 pin.
16
Port 1.0 set bit.
Set to 1 by user code to set the external GPIO_5 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_5 pin.
15 to 0
Reserved. These bits are reserved and should be written as 0 by user code.
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