參數(shù)資料
型號： ADSP-2192M
廠商： Analog Devices, Inc.
元件分類： 數(shù)字信號處理
英文描述： DSP Microcomputer
中文描述： DSP微機
文件頁數(shù)： 5/40頁
文件大小： 1307K
代理商： ADSP-2192M
–5–
REV. 0
ADSP-2192M
Table 2
shows the interrupt vector and DSP-to-DSP semaphores
at reset of each of the peripheral interrupts. The peripheral inter-
rupt’s position in the IMASK and IRPTL register and its vector
address depend on its priority level, as shown in
Table 2
.
Figure 2. ADSP-2192M Internal/External Memory, Boot Memory, and I/O Memory Maps
SHARED RAM
(16
4K)
DATA RAM
BLOCK3
(16
16K)
DATA RAM
BLOCK2
(16
16K)
DATA RAM
BLOCK1
(16
16K)
RESERVED
0x00 0000
0x00 3FFF
0x00 4000
0x00 8000
0x00 C000
0x01 0000
0x01 4FFF
0x01 4000
0x01 5000
0x01 FFFF
ADDRESS
DATA RAM
BLOCK0
(16
16K)
0x00 7FFF
0x00 BFFF
0x00 FFFF
PROGRAM RAM
(24
16K)
PROGRAM ROM
24
4K
0x01 3FFF
0x02 0000
0x02 0FFF
DSP P0
MEMORY MAP
PAGE 2
PAGE 1
PAGE 0
SHARED
DSP I/O
MAPPED
REGISTERS
PAGES 0 255
(16
256)
0x00 00
0xFF FF
ADDRESS
SHARED RAM
(16
4K)
DATA RAM
BLOCK1
(16
16K)
RESERVED
0x00 0000
0x00 3FFF
0x00 4000
0x00 8000
0x01 0000
0x01 4FFF
0x01 4000
0x01 5000
0x01 FFFF
ADDRESS
DATA RAM
BLOCK0
(16
16K)
0x00 7FFF
0x00 FFFF
PROGRAM RAM
(24
16K)
PROGRAM ROM
24
4K
0x01 3FFF
0x02 0000
0x02 0FFF
DSP P1
MEMORY MAP
RESERVED
PAGE 2
PAGE 1
PAGE 0
SAME
Table 1. DSP-to-DSP Semaphores Register Table
Flag
Bit
Direction
Function
0
1
2
3
4
5
6
7
8
9
10
11
12
Output
Output
Output
DSP–DSP Semaphore 0
DSP–DSP Semaphore 1
DSP–DSP Interrupt
Reserved
Reserved
Reserved
Reserved
Register Bus Lock
DSP–DSP Semaphore 0
DSP–DSP Semaphore 1
DSP–DSP Interrupt
Reserved
AC’97 Register–PDC Bus Access
Status
PDC Interface Busy Status (write
from DSP pending)
Reserved
Register Bus Lock Status
Output
Input
Input
Input
Input
Input
13
Input
14
15
Input
Input
Table 2. Vector Table
Bit
Priority
Interrupt
Vector
Address
Offset
1
0
1
1
2
Reset (non-maskable)
Power-Down (non-
maskable)
Kernel interrupt
(single step)
Stack Status
Mailbox
Timer
GPIO
PCI Bus Master
DSP–DSP
FIFO0 Transmit
FIFO0 Receive
FIFO1 Transmit
FIFO1 Receive
Reserved
Reserved
AC’97 Frame
0x00
0x04
2
3
0x08
3
4
5
6
7
8
9
10
11
12
13
14
15
4
5
6
7
8
9
10
11
12
13
14
15
16
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
1
The interrupt vector address values are represented as offsets from
address 0x01 0000. This address corresponds to the start of Program
Memory in DSP P0 and P1.
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