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參數(shù)資料
| 型號： | ADS1286P |
| 元件分類： | ADC |
| 英文描述： | Analog-to-Digital Converter??? 12-Bit |
| 中文描述： | 12位模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 27/42頁 |
| 文件大?。?/td> | 872K |
| 代理商： | ADS1286P |
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ADS1212, 1213
SBAS064A
27
Start
Writing
ADS1212/13
drives DRDY LOW
CS
state
ADS1212/13
generates 8
serial clock cycles
and receives
Instruction Register
data via SDIO
ADS1212/13
generates n
serial clock cycles
and receives
specified
register data
via SDIO
ADS1212/13
drives DRDY HIGH
End
ADS1212/13
generates 8 serial clock
cycles and receives
Instruction Register
data via SDIO
ADS1212/13 generates n
serial clock cycles
and transmits specified
register data via SDOUT
End
Start
Reading
ADS1212/13
drives DRDY LOW
CS
state
Continuous
Read
Mode
ADS1212/13
drives DRDY HIGH
SDOUT returns to
tri-state condition
SDOUT becomes
active from tri-state
Use
SDIO for
output
LOW
No
Yes
LOW
HIGH
No
Yes
ADS1212/13 generates n
serial clock cycles
and transmits specified
register data via SDIO
SDIO transitions to
tri-state condition
SDIO input to
output transition
HIGH
CS
state
LOW
HIGH
For example, Figure 24 shows that just prior to the DRDY
signal going LOW, the internal Data Output Register (DOR)
is updated. This update involves the Offset Calibration
Register (OCR) and the Full-Scale Register (FSR). If the
OCR or FSR are being written, their final value may not be
correct, and the result placed into the DOR will certainly not
be valid. Problems can also arise if certain bits of the
Command Register are being changed.
Note that reading the Data Output Register is an excep-
tion. If the DOR is being read when the internal update is
initiated, the update is blocked. The old output data will
remain in the DOR and the new data will be lost. The old
data will remain valid until the read operation has com-
pleted. In general, multiple instructions may be issued, but
the last one in any conversion period should be complete
within 24 X
IN
clock periods of the next DRDY LOW
time. In this usage, “complete” refers to the point where
DRDY rises in Figures 17 and 19 (in the Timing Section).
Consult Figures 25 and 26 for the flow of serial data
during any one conversion period.
FIGURE 25. Flowchart for Writing and Reading Register Data, Master Mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS1286PA | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PB | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PC | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PK | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PL | Analog-to-Digital Converter??? 12-Bit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1286P | 制造商:Texas Instruments 功能描述:IC 12BIT ADC 200 KHZ PDIP8 1286 |
| ADS1286PA | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12bit 200KHz Unipol RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1286PA | 制造商:BURR-BROWN 功能描述:IC 12BIT ADC 1286 DIP8 制造商:Texas Instruments 功能描述:Analog-Digital Converter IC Number of Bi |
| ADS1286PAG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12B Micro Pwr Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1286PB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit Micro Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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