參數(shù)資料
型號: ADS1286P
元件分類: ADC
英文描述: Analog-to-Digital Converter??? 12-Bit
中文描述: 12位模數(shù)轉換器
文件頁數(shù): 11/42頁
文件大?。?/td> 872K
代理商: ADS1286P
ADS1212, 1213
SBAS064A
11
f
DATA
=
f
XIN
Turbo Mode
128
Decimation Ratio
+1
(
)
f
MOD
=
f
XIN
Turbo Mode
128
f
XIN
The frequency of the crystal oscillator or CMOS
compatible input signal at the X
IN
input of the ADS1212/13.
f
MOD
The frequency or speed at which the modulator of the
ADS1212/13 is running, given by the following equation:
f
SAMP
The frequency or switching speed of the input
sampling capacitor. The value is given by the following
equation:
f
DATA
, t
DATA
The frequency of the digital output data
produced by the ADS1212/13 or the inverse of this (the
period), respectively, f
DATA
is also referred to as the data rate.
Conversion Cycle—
The term “conversion cycle” usually
refers to a discrete A/D conversion operation, such as that
performed by a successive approximation converter. As
used here, a conversion cycle refers to the t
DATA
time period.
However, each digital output is actually based on the modu-
lator results from the last three t
DATA
time periods.
DIGITAL FILTER
The digital filter of the ADS1212/13 computes the output
result based on the most recent results from the delta-sigma
modulator. The number of modulator results that are used
depend on the decimation ratio set in the Command Regis-
ter. At the most basic level, the digital filter can be thought
of as simply averaging the modulator results and presenting
this average as the digital output.
While the decimation ratio determines the number of modu-
lator results to use, the modulator runs faster at higher Turbo
Modes. These two items, together with the ADS1212/13
clock frequency, determine the output data rate:
Also, since the conversion result is essentially an average,
the data rate determines where the resulting notches are in
the digital filter. For example, if the output data rate is 1kHz,
then a 1kHz input frequency will average to zero during the
1ms conversion cycle. Likewise, a 2kHz input frequency
will average to zero, etc.
In this manner, the data rate can be used to set specific notch
frequencies in the digital filter response (see Figure 1 for the
normalized response of the digital filter). For example, if the
rejection of power line frequencies is desired, then the data
rate can simply be set to the power line frequency. Figures
2 and 3 show the digital filter response for a data rate of
50Hz and 60Hz, respectively.
f
SAMP
=
f
XIN
Turbo Mode
Gain Setting
128
FILTER RESPONSE
Frequency (Hz)
40
60
80
100
120
140
160
45
46
47
48
49
50
51
52
53
54
55
FILTER RESPONSE
Frequency (Hz)
0
20
40
60
80
100
120
140
160
0
50
100
150
200
250
300
G
G
NORMALIZED DIGITAL FILTER RESPONSE
Frequency (Hz)
0
20
40
60
80
100
120
140
160
0
1
2
3
4
5
6
G
FIGURE 3. Digital Filter Response at a Data Rate of 60Hz.
FIGURE 1. Normalized Digital Filter Response.
FIGURE 2. Digital Filter Response at a Data Rate of 50Hz.
If the effective resolution at a 50Hz or 60Hz data rate is not
adequate for the particular application, then power line fre-
quencies could still be rejected by operating the ADS1212/13
at 25/30Hz, 16.7/20Hz, 12.5/15Hz, etc. If a higher data rate
is needed, then power line frequencies must either be rejected
before conversion (with an analog notch filter) or after
conversion (with a digital notch filter running on the main
controller).
FILTER RESPONSE
Frequency (Hz)
40
60
80
100
120
140
160
55
56
57
58
59
60
61
62
63
64
65
FILTER RESPONSE
Frequency (Hz)
0
20
40
60
80
100
120
140
160
0
50
100
150
200
250
300
G
G
f
DATA
=
f
XIN
Turbo Mode
128
Decimation Ratio
+1
(
)
,
t
DATA
=
1
f
DATA
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