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參數(shù)資料
| 型號： | ADS1286P |
| 元件分類： | ADC |
| 英文描述： | Analog-to-Digital Converter??? 12-Bit |
| 中文描述： | 12位模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 23/42頁 |
| 文件大?。?/td> | 872K |
| 代理商： | ADS1286P |
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ADS1212, 1213
SBAS064A
23
SYMBOL
DESCRIPTION
MIN
NOM
MAX
UNITS
f
XIN
t
XIN
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
14
t
15
t
16
X
IN
Clock Frequency
X
IN
Clock Period
X
IN
Clock High
X
IN
Clock LOW
Internal Serial Clock HIGH
0.5
1
2.5
MHz
400
2000
ns
0.4
t
XIN
0.4
t
XIN
ns
ns
2
t
XIN
2
t
XIN
ns
Internal Serial Clock LOW
ns
Data In Valid to Internal SCLK Falling Edge (Setup)
40
ns
Internal SCLK Falling Edge to Data In Not Valid (Hold)
20
ns
Data Out Valid to Internal SCLK Falling Edge (Setup)
2
t
XIN
–
25
2
t
XIN
5
t
XIN
5
t
XIN
40
ns
Internal SCLK Falling Edge to Data Out Not Valid (Hold)
ns
External Serial Clock HIGH
ns
External Serial Clock LOW
ns
Data In Valid to External SCLK Falling Edge (Setup)
ns
External SCLK Falling Edge to Data In Not Valid (Hold)
20
ns
Data Out Valid to External SCLK Falling Edge (Setup)
t
XIN
–
40
4
t
XIN
ns
External SCLK Falling Edge to Data Out Not Valid (Hold)
ns
Falling Edge of DRDY to First SCLK Rising Edge
(Mode, CS Tied LOW)
12
t
XIN
ns
t
17
Falling Edge of Last SCLK for INSR to Rising Edge of First
SCLK for Register Data (Master Mode)
10
t
XIN
ns
t
18
Falling Edge of Last SCLK for Register Data to Rising Edge
of DRDY (Master Mode)
6
t
XIN
ns
t
19
Falling Edge of Last SCLK for INSR to Rising Edge of First
SCLK for Register Data (Slave Mode)
13
t
XIN
ns
ns
t
20
Falling Edge of Last SCLK for Register Data to Rising Edge
of DRDY (Slave Mode)
8
t
XIN
10
t
XIN
ns
t
21
Falling Edge of DRDY to Falling Edge of CS (Master and
Slave Mode)
3
t
XIN
ns
t
22
t
23
Falling Edge of CS to Rising Edge of SCLK (Master Mode)
10
t
XIN
2
t
XIN
12
t
XIN
ns
Rising Edge of DRDY to Rising Edge of CS (Master and
Slave Mode)
ns
t
24
t
25
Falling Edge of CS to Rising Edge of SCLK (Slave Mode)
11
t
XIN
ns
Falling Edge of Last SCLK for INSR to SDIO Tri-state
(Master Mode)
4
t
XIN
ns
t
26
SDIO as Output to Rising Edge of First SCLK for Register
Data (Master and Slave Modes)
4
t
XIN
ns
t
27
Falling Edge of Last SCLK for INSR to SDIO Tri-state
(Slave Mode)
6
t
XIN
8
t
XIN
ns
t
28
t
29
SDIO Tri-state Time (Master and Slave Modes)
2
t
XIN
2
t
XIN
ns
Falling Edge of Last SCLK for Register Data to SDIO Tri-State
(Master Mode)
ns
t
30
Falling Edge of Last SCLK for Register Data to SDIO
Tri-state (Slave Mode)
4
t
XIN
6
t
XIN
ns
t
31
t
32
t
33
t
34
DRDY Fall Time
30
ns
DRDY Rise Time
30
ns
Minimum DSYNC LOW Time
21
t
XIN
10
ns
DSYNC Valid HIGH to Falling Edge of X
(for Exact
Synchronization of Multiple Converters Only)
ns
t
35
Falling Edge of X
to DSYNC Not Valid LOW (for Exact
Synchronization of Multiple Converters Only)
10
ns
t
36
Falling Edge of Last SCLK for Register Data to Rising Edge
of First SCLK of next INSR (Slave Mode, CS Tied LOW)
41
t
XIN
ns
t
37
Rising Edge of CS to Falling Edge of CS (Slave Mode,
Using CS)
22
t
XIN
ns
t
38
Falling Edge of DRDY to First SCLK
Rising Edge (Slave Mode, CS Tied LOW)
11
t
XIN
ns
TABLE XV. Digital Timing Characteristics.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS1286PA | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PB | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PC | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PK | Analog-to-Digital Converter??? 12-Bit |
| ADS1286PL | Analog-to-Digital Converter??? 12-Bit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1286P | 制造商:Texas Instruments 功能描述:IC 12BIT ADC 200 KHZ PDIP8 1286 |
| ADS1286PA | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12bit 200KHz Unipol RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1286PA | 制造商:BURR-BROWN 功能描述:IC 12BIT ADC 1286 DIP8 制造商:Texas Instruments 功能描述:Analog-Digital Converter IC Number of Bi |
| ADS1286PAG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12B Micro Pwr Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1286PB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit Micro Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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