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參數(shù)資料
| 型號： | ADN4605ABPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/56頁 |
| 文件大小： | 0K |
| 描述： | IC CROSSPOINT SWITCH 352BGA |
| 標準包裝： | 1 |
| 系列： | XStream™ |
| 功能： | 交叉點開關(guān) |
| 電路： | 1 x 40:40 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.25 V ~ 3.6 V |
| 電流 - 電源： | 55mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 352-LBGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 352-BGA-EP（35x35） |
| 包裝： | 托盤 |
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Data Sheet
ADN4605
Rev. A | Page 27 of 56
SWITCH CORE
The ADN4605 switch core is a fully nonblocking 40 × 40 array
that allows multicast and broadcast configurations. The config-
uration of the switch core is programmed through either the
serial or parallel control interface. The crosspoint configuration
map, which controls the connectivity of the switch core, consists
of a double rank register architecture, as shown in Figure 42.
The second rank registers contain the current state of the
crosspoint. The first rank registers contain the next state. Each
entry in the connection map stores six bits per output, which
indicates which of the 40 inputs are connected to a given
output. An entire connectivity matrix can be programmed
at once by passing data from the first rank registers into the
second rank by writing 0x01 to the XPT Update register
(Address 0x01). An external UPDATE pin can also be used to
control the data transfer as shown in Table 8.
The first rank registers store connection configurations for
the crosspoint. Map 0 is the default map and is located at
Address 0x04 to Address 0x2B. By default, Map 0 contains
a diagonal connection configuration whereby Input 0 is
connected to Output 0, Input 1 to Output 1, Input 2 to
Output 2, and so on.
Similarly, by default, Map 1 contains the opposite diagonal
connection configuration where Input 0 is connected to
Output 39, Input 1 to Output 38, and so on. Both maps are
read/write accessible registers. The active map is selected by
writing to the XPT Map Table Select register (Address 0x02).
The crosspoint is configured by addressing the register assigned
to the desired output and writing the desired connection data
into the first rank of latches in either Map 0 or Map 1. The
connection data is equivalent to the binary coded value of the
input number. This process is repeated until each of the desired
connections is programmed.
In situations where multiple outputs are to be programmed to
a single input, a broadcast command is available. A broadcast
command is issued by writing the binary value of the desired
input to the XPT Broadcast register (Address 0x03). The broad-
cast is applied to the selected map table.
The current state of the crosspoint connectivity is available
by reading the XPT Status registers (Address 0x54 to Address
0x7B). Register descriptions for Map 0, Map 1, and XPT status
registers are shown in Table 11.
0
39
0
39
INP
UT
S
INP
UT
S
REGISTER 0x04 TO REGISTER 0x2B
XPT MAP 0
OUTPUTS
REGISTER 0x2C TO REGISTER 0x53
XPT MAP 1
OUTPUTS
0
1
MAP TABLE
SELECT
REGISTER 0x02
XPT STATUS READ
REGISTER 0x54 TO REGISTER 0x7B
UPDATE
REGISTER 0x01/
EXTERNAL PIN
FIRST RANK REGISTERS
SECOND
RANK REGISTERS
0
39
0
39
XPT CORE
OUTPUTS
09796-
009
0
39
0
39
INP
UT
S
Figure 42. Crosspoint Connection Map Block Diagram
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