參數(shù)資料
型號(hào): ADE7753ARSZRL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: ROHS COMPLIANT, MO-150AE, SSOP-20
文件頁(yè)數(shù): 52/60頁(yè)
文件大小: 938K
代理商: ADE7753ARSZRL
ADE7753
Rev. C | Page 56 of 60
Bit Location
Bit Mnemonic
Default
Value
Description
14, 13
WAVSEL1, 0
00
These bits are used to select the source of the sampled data for the waveform register.
WAVSEL1, 0
Length
Source
0
24 bits active power signal (output of LPF2)
0
1
Reserved
1
0
24 bits Channel 1
1
24 bits Channel 2
15
POAM
0
Writing Logic 1 to this bit allows only positive active power to be accumulated in the ADE7753.
0
00
0
00
01
10
0
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
ADDR: 0x09
SWAP
(SWAP CH1 AND CH2 ADCs)
DTRT
(WAVEFORM SAMPLES OUTPUT DATA RATE)
00 = 27.9kSPS (CLKIN/128)
01 = 14.4kSPS (CLKIN/256)
10 = 7.2kSPS (CLKIN/512)
11 = 3.6kSPS (CLKIN/1024)
POAM
(POSITIVE ONLY ACCUMULATION)
WAVSEL
(WAVEFORM SELECTION FOR SAMPLE MODE)
00 = LPF2
01 = RESERVED
10 = CH1
11 = CH2
DISHPF
(DISABLE HPF1 IN CHANNEL 1)
DISLPF2
(DISABLE LPF2 AFTER MULTIPLIER)
DISCF
(DISABLE FREQUENCY OUTPUT CF)
DISSAG
(DISABLE SAG OUTPUT)
ASUSPEND
(SUSPEND CH1 AND CH2 ADCs)
TEMPSEL
(START TEMPERATURE SENSING)
SWRST
(SOFTWARE CHIP RESET)
CYCMODE
(LINE CYCLE ENERGY ACCUMULATION MODE)
DISCH2
(SHORT THE ANALOG INPUTS ON CHANNEL 2)
DISCH1
(SHORT THE ANALOG INPUTS ON CHANNEL 1)
NOTE: REGISTER CONTENTS SHOW POWER-ON DEFAULTS
02875-0-084
Figure 95. Mode Register
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