參數(shù)資料
型號: ADE7753ARSZRL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: ROHS COMPLIANT, MO-150AE, SSOP-20
文件頁數(shù): 46/60頁
文件大?。?/td> 938K
代理商: ADE7753ARSZRL
ADE7753
Rev. C | Page 50 of 60
ADE7753 Serial Write Operation
The serial write sequence takes place as follows. With the
ADE7753 in communications mode (i.e., the CS input logic
low), a write to the communications register first takes place.
The MSB of this byte transfer is a 1, indicating that the data
transfer operation is a write. The LSBs of this byte contain the
address of the register to be written to. The ADE7753 starts
shifting in the register data on the next falling edge of SCLK. All
remaining bits of register data are shifted in on the falling edge
of subsequent SCLK pulses—see
. As explained earlier,
the data write is initiated by a write to the communications
register followed by the data. During a data write operation to
the ADE7753, data is transferred to all on-chip registers one
byte at a time. After a byte is transferred into the serial port,
there is a finite time before it is transferred to one of the
ADE7753 on-chip registers. Although another byte transfer to
the serial port can start while the previous byte is being
transferred to an on-chip register, this second byte transfer
should not finish until at least 4 μs after the end of the previous
byte transfer. This functionality is expressed in the timing
specification t6—see Figure 92. If a write operation is aborted
during a byte transfer (CS brought high), then that byte cannot
be written to the destination register.
Destination registers can be up to 3 bytes wide—see the
ADE7753 Register Description tables. Therefore the first byte
shifted into the serial port at DIN is transferred to the MSB
(most significant byte) of the destination register. If, for
example, the addressed register is 12 bits wide, a 2-byte data
transfer must take place. The data is always assumed to be right
justified, therefore in this case, the four MSBs of the first byte
would be ignored and the four LSBs of the first byte written to
the ADE7753 would be the four MSBs of the 12-bit word.
Figure 93 illustrates this example.
DIN
SCLK
CS
t2
t3
t1
t4
t5
t7
t6
t8
COMMAND BYTE
MOST SIGNIFICANT BYTE
LEAST SIGNIFICANT BYTE
10
A4
A5
A3
A2
A1
A0
DB7
DB0
DB7
DB0
t7
02875-0-081
Figure 92. Serial Interface Write Timing
SCLK
DIN
X
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
MOST SIGNIFICANT BYTE
LEAST SIGNIFICANT BYTE
02875-0-082
Figure 93. 12-Bit Serial Write Operation
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