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參數(shù)資料
| 型號(hào)： | ADE7753ARSZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | ROHS COMPLIANT, MO-150AE, SSOP-20 |
| 文件頁數(shù)： | 47/60頁 |
| 文件大?。?/td> | 938K |
| 代理商： | ADE7753ARSZRL |
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ADE7753
Rev. C | Page 51 of 60
ADE7753 Serial Read Operation
During a data read operation from the ADE7753, data is shifted
out at the DOUT logic output on the rising edge of SCLK. As is
the case with the data write operation, a data read must be
preceded with a write to the communications register.
With the ADE7753 in communications mode (i.e., CS logic
low), an 8-bit write to the communications register first takes
place. The MSB of this byte transfer is a 0, indicating that the
next data transfer operation is a read. The LSBs of this byte
contain the address of the register that is to be read. The
ADE7753 starts shifting out of the register data on the next
rising edge of SCLK—see
. At this point, the DOUT
logic output leaves its high impedance state and starts driving
the data bus. All remaining bits of register data are shifted out
on subsequent SCLK rising edges. The serial interface also
enters communications mode again as soon as the read has
been completed. At this point, the DOUT logic output enters a
high impedance state on the falling edge of the last SCLK pulse.
The read operation can be aborted by bringing the
CS logic
input high before the data transfer is complete. The DOUT
output enters a high impedance state on the rising edge of CS.
When an ADE7753 register is addressed for a read operation,
the entire contents of that register are transferred to the serial
port. This allows the ADE7753 to modify its on-chip registers
without the risk of corrupting data during a multibyte transfer.
Note that when a read operation follows a write operation, the
read command (i.e., write to communications register) should
not happen for at least 4 μs after the end of the write operation.
If the read command is sent within 4 μs of the write operation,
the last byte of the write operation could be lost. This timing
constraint is given as timing specification t9.
SCLK
CS
t1
t10
t13
0
A4
A5
A3
A2
A1
A0
DB0
DB7
DB0
DB7
DIN
DOUT
t11
t12
COMMAND BYTE
MOST SIGNIFICANT BYTE
LEAST SIGNIFICANT BYTE
t9
02875-0-083
Figure 94. Serial Interface Read Timing
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