參數(shù)資料
型號(hào)： ADE7753ARSZRL
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PDSO20
封裝： ROHS COMPLIANT, MO-150AE, SSOP-20
文件頁(yè)數(shù)： 17/60頁(yè)
文件大?。?/td> 938K
代理商： ADE7753ARSZRL
ADE7753
Rev. C | Page 24 of 60
1, 2, 4,
8, 16
ANALOG
INPUT
RANGE
DIGITAL
INTEGRATOR*
dt
HPF
ADC 1
REFERENCE
2.42V, 1.21V, 0.6V
V1
0V
0.5V, 0.25V,
0.125V, 62.5mV,
31.3mV, 15.6mV,
CHANNEL 1
(CURRENT WAVEFORM)
DATA RANGE
ACTIVE AND REACTIVE
POWER CALCULATION
WAVEFORM SAMPLE
REGISTER
CURRENT RMS (IRMS)
CALCULATION
50Hz
V1P
V1N
PGA1
V1
{GAIN[4:3]}
{GAIN[2:0]}
*WHEN DIGITAL INTEGRATOR IS ENABLED, FULL-SCALE OUTPUT DATA IS ATTENUATED
DEPENDING ON THE SIGNAL FREQUENCY BECAUSE THE INTEGRATOR HAS A –20dB/DECADE
FREQUENCY RESPONSE. WHEN DISABLED, THE OUTPUT WILL NOT BE FURTHER ATTENUATED.
ADC OUTPUT
WORD RANGE
0xD7AE14
0x00000
0x2851EC
0xD7AE14
0x000000
0x2851EC
CHANNEL 1
(CURRENT WAVEFORM)
DATA RANGE AFTER
INTEGRATOR (50Hz)
0xEI08C4
0x000000
0x1EF73C
60Hz
CHANNEL 1
(CURRENT WAVEFORM)
DATA RANGE AFTER
INTEGRATOR (60Hz)
0xE631F8
0x000000
0x19CE08
02875-0-052
Figure 51. ADC and Signal Processing in Channel 1
Channel 1 Sampling
The waveform samples can also be routed to the waveform
register (MODE[14:13] = 1,0) to be read by the system master
(MCU). In waveform sampling mode, the WSMP bit (Bit 3) in
the interrupt enable register must also be set to Logic 1. The
active, apparent power, and energy calculation remain
uninterrupted during waveform sampling.
When in waveform sampling mode, one of four output sample
rates can be chosen by using Bits 11 and 12 of the mode register
(WAVSEL1,0). The output sample rate can be 27.9 kSPS, 14 kSPS,
7 kSPS, or 3.5 kSPS—see the Mode Register (0x09) section. The
interrupt request output, IRQ, signals a new sample availability
by going active low. The timing is shown in
. The 24-bit
waveform samples are transferred from the ADE7753 one byte
(eight bits) at a time, with the most significant byte shifted out
first. The 24-bit data-word is right justified—see the
section. The interrupt request output
IRQ stays
low until the interrupt routine reads the reset status register—
see the
section.
CHANNEL 1 DATA
(24 BITS)
READ FROM WAVEFORM
SIGN
0
IRQ
SCLK
DIN
DOUT
0 0 01 HEX
02875-0-050
Figure 52. Waveform Sampling Channel 1
Channel 1 RMS Calculation
Root mean square (rms) value of a continuous signal V(t) is
defined as
VRMS
=
∫
×
=
T
rms
dt
t
V
T
V
0
2
)
(
1
(2)
For time sampling signals, rms calculation involves squaring the
signal, taking the average and obtaining the square root:
VRMS
=
∑
=
×
=
N
i
rms
i
V
N
V
1
2
)
(
1
(3)
The ADE7753 simultaneously calculates the rms values for
Channel 1 and Channel 2 in different registers. Figure 53 shows
the detail of the signal processing chain for the rms calculation
on Channel 1. The Channel 1 rms value is processed from the
samples used in the Channel 1 waveform sampling mode. The
Channel 1 rms value is stored in an unsigned 24-bit register
(IRMS). One LSB of the Channel 1 rms register is equivalent to
one LSB of a Channel 1 waveform sample. The update rate of
the Channel 1 rms measurement is CLKIN/4.
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