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| 型號： | AD9974BBCZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCDSP DUAL 14BIT 100-CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | CCD 信號處理器，14 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 電流 - 電源： | 55mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 100-CSBGA（9x9） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD9974BBCZRLDKR |
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AD9974
Rev. A | Page 30 of 52
Input Configurations
The CDS circuit samples each CCD pixel twice to extract the video
information and reject low frequency noise (see Figure 39). There
are three possible configurations for the CDS: inverting CDS mode,
noninverting CDS mode, and SHA mode. The CDSMODE
register (Address 0x00[9:8]) selects which configuration is used.
SHA1
SHA2
SHD
SHP
DIFF
AMP
CDS_OUT
CCDINP
CCDINM
05
95
5-
03
9
Figure 39. CDS Block Diagram (Conceptual)
Inverting CDS Mode
For this configuration, the signal from the CCD is applied to the
positive input of the (CCDINP) CDS system with the minus
side (CCDINM) grounded (see Figure 40). The CDSMODE
register setting for this configuration is 0x00. Traditional CCD
applications use this configuration with the reset level established
below the AVDD supply level by the AD9974 dc restore circuit,
at approximately 1.5 V. The maximum saturation level is 1.0 V
mum saturation voltage of 1.4 V is also possible when using the
minimum CDS gain setting.
IMAGE
SENSOR
SHA/
CDS
CCDINM
CCDINP
AD9974
NOTES
1. COUPLING CAPACITOR IS NOT REQUIRED FOR CERTAIN
BLACK LEVEL REFERENCE VOLTAGES.
0
59
55
-04
0
Figure 40. Single Input CDS Configuration
(N) SIGNAL SAMPLE
(N) RESET SAMPLE
(N + 1) RESET SAMPLE
VDD
RESET LEVEL
(VRST)
SIGNAL LEVEL
(VFS)
0
5955-
041
Figure 41. Traditional Inverting CDS Signal
Table 16. Inverting Voltage Levels
Signal Level
Symbol
Min (mV)
Typ (mV)
Max (mV)
Saturation
VFS
1000
1400
Reset
VRST
VDD 500
VDD 300
VDD
Supply Voltage
VDD
1600
1800
2000
Noninverting Input
If the noninverting input is desired, the reset (or black) level
signal is established at a voltage above ground potential.
Saturation (or white) level is approximately 1 V. Samples are
(N) SIGNAL SAMPLE
(N) RESET SAMPLE
(N + 1) RESET SAMPLE
GND
RESET LEVEL
(VRST)
SIGNAL LEVEL
(VFS)
05955-
042
Figure 42. Noninverting CDS Signal
Table 17. Noninverting Voltage Levels
Signal Level
Symbol
Min (mV)
Typ (mV)
Max (mV)
Saturation
VFS
1000
1400
Reset
VRST
0
250
500
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