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參數(shù)資料
| 型號： | AD9880KSTZ-150 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC INTERFACE/HDMI 150MHZ 100LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 應(yīng)用： | 視頻 |
| 接口： | 模擬，HDMI |
| 電源電壓： | 3.15 V ~ 3.47 V |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
| 產(chǎn)品目錄頁面： | 775 (CN2011-ZH PDF) |
| 配用： | AD9880/PCBZ-ND - KIT EVALUATION AD9880 |
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AD9880
Rev. 0 | Page 23 of 64
2-WIRE SERIAL REGISTER MAP
The AD9880 is initialized and controlled by a set of registers that determines the operating modes. An external controller is employed to
write and read the control registers through the 2-wire serial interface port.
Table 11. Control Register Map
Hex
Address
Read/Write
or Read Only
Bits
Default
Value
Register Name
Description
0x00
Read
[7:0]
00000000
Chip Revision
Chip revision ID. Revision is read [7:4]. [3:0].
0x01
Read/Write
[7:0]
01101001
PLL Divider MSB
PLL feedback divider value MSB.
0x02
Read/Write
[7:4]
1101****
PLL Divider
PLL feedback divider value.
0x03
Read/Write
[7:6]
01******
VCO Range
VCO range.
[5:3]
**001***
Charge Pump
Charge pump current control for PLL.
[2]
*****0**
External Clock Enable
Selects the external clock input rather that the internal PLL
clock.
0x04
Read/Write
[7:3]
10000***
Phase Adjust
Selects the clock phase to use for the ADC clock.
0x05
Read/Write
[7:0]
10000000
Red Gain
Controls the gain of the red channel PGA. 0 = low gain,
255 = high gain.
0x06
Read/Write
[7:0]
10000000
Green Gain
Controls the gain of the green channel PGA. 0 = low gain,
255 = high gain.
0x07
Read/Write
[7:0]
10000000
Blue Gain
Controls the gain of the blue channel PGA. 0 = low gain,
255 = high gain.
0x08
Read/Write
[7:0]
00000000
Red Offset Adjust
User adjustment of auto offset. Allows user control of brightness.
0x09
Read/Write
[7:0]
10000000
Red Offset
Red offset/target code. 0 = small offset, 255 = large offset.
0x0A
Read/Write
[7:0]
00000000
Green Offset Adjust
User adjustment of auto offset. Allows user control of brightness.
0x0B
Read/Write
[7:0]
10000000
Green Offset
Green offset/target code. 0 = small offset, 255 = large offset.
0x0C
Read/Write
[7:0]
00000000
Blue Offset Adjust
User adjustment of auto offset. Allows user control of brightness.
0x0D
Read/Write
[7:0]
10000000
Blue Offset
Blue offset/target code. 0 = small offset, 255 = large offset.
0x0E
Read/Write
[7:0]
00100000
Sync Separator
Threshold
Selects the maximum Hsync pulse width for composite sync
separation.
0x0F
Read/Write
[7:2]
010000**
SOG Comparator
Threshold Enter
The enter level for the SOG slicer. Must be less than or equal to
the exit level.
0x10
Read/Write
[7:2]
010000**
SOG Comparator
Threshold Exit
The exit level for the SOG slicer. Must be greater than or equal to
the enter level.
0x11
Read/Write
[7]
0*******
Hsync Source
0 = Hsync.
1 = SOG.
[6]
*0******
Hsync Source
Override
0 = auto Hsync source.
1 = manual Hsync source.
[5]
**0*****
Vsync Source
0 = Vsync.
1 = Vsync from SOG.
[4]
***0****
Vsync Source
Override
0 = auto Hsync source.
1 = manual Hsync source.
[3]
****0***
Channel Select
0 = Channel 0.
1 = Channel 1.
[2]
*****0**
Channel Select
Override
0 = autochannel select.
1 = manual channel select.
[1]
******0*
Interface Select
0 = analog interface.
1 = digital interface.
[0]
*******0
Interface Override
0 = auto-interface select.
1 = manual interface select.
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