參數(shù)資料
型號: AD9547BCPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 12/104頁
文件大?。?/td> 0K
描述: IC CLOCK GEN/SYNCHRONIZR 64LFCSP
產(chǎn)品變化通告: AD9547 Mask Change 20/Oct/2010
標(biāo)準(zhǔn)包裝: 750
類型: 時鐘/頻率發(fā)生器,同步器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,Stratum
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 750kHz
電源電壓: 1.71 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
Data Sheet
AD9547
Rev. E | Page 15 of 104
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A
V
DD
A
V
DD
VSS
CL
KI
NN
CL
KI
N
P
VSS
A
V
DD
O
UT
_RS
E
T
A
V
DD3
OU
T0
P
O
UT
0N
A
V
DD
OU
T1
P
O
UT
1N
A
V
DD3
A
V
DD
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
DV
DD
M7
M6
M5
M4
DV
DD
DV
DD3
M3
M2
M1
M0
DV
DD
IRQ
NC
A
V
DD
A
V
DD3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DVDD
SCLK/SCL
SDIO
SDO
CS/SDA
DVDD
DVDD3
DVDD
RESET
DVDD
VSS
DACOUTP
DACOUTN
VSS
AVDD3
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND (VSS).
REFBB
REFB
AVDD
REFAA
REFA
AVDD3
AVDD
TDC_VRT
TDC_VRB
AVDD
SYSCLKP
SYSCLKN
AVDD
SYSCLK_LF
SYSCLK_VREG
AVDD3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AD9547
TOP VIEW
(Not to Scale)
08300-
002
Figure 2. Pin Configuration
Table 21. Pin FunctionDescriptions
Pin No.
Input/
Output
Pin Type
Mnemonic
Description
1, 6, 8, 53, 59,
64
I
Power
DVDD
1.8 V Digital Supply.
2
I
3.3 V CMOS
SCLK/SCL
Serial Programming Clock. Data clock for serial programming. SCLK is used for
SPI mode, and SCL is used for I2C mode.
3
I/O
3.3 V CMOS
SDIO
Serial Data Input/Output. When the device is in 4-wire mode, data is written
via this pin. In 3-wire mode, both data reads and writes occur on this pin.
There is no internal pull-up/pull-downresistor on this pin.
4
O
3.3 V CMOS
SDO
Serial Data Output. Use this pinto read data in 4-wire mode (high impedance
in 3-wire mode). There is no internal pull-up/pull-downresistor on this pin.
5
I
3.3 V CMOS
CS/SDA
SPI Mode.
Chip Select (CS) Input. Active low. When programminga device, this pinmust
be heldlow. Insystems wheremorethanone AD9547 ispresent, thispinenables
individual programmingof each AD9547. In SPI mode, this pin has an internal
30 k pull-up resistor.
I2C Mode.
Serial Data Line (SDA) Input/Output. In I2C Mode, this pinis an output during
read operations and an input during write operations. There is no internal
pull-up resistor inI2C mode.
7, 58
I
Power
DVDD3
3.3 V I/O Digital Supply.
9
I
3.3 V CMOS
RESET
Chip Reset. Assertion of this pin (active high) resets the device. This pinhas an
internal 50 k pull-down resistor.
10, 11
I
Power
DVDD
1.8 V DAC Decode Digital Supply. Isolate the supply associated with these
DVDD pins from the supply associated with the other DVDD pins.
12, 15, 19, 22
O
Ground
VSS
Analog Ground. Connect to ground.
13
O
Differential
output
DACOUTP
DAC Output. DACOUTP contains an internal 50 pull-downresistor.
14
O
Differential
output
DACOUTN
Complementary DAC Output. DACOUTN contains an internal 50 pull-down
resistor.
16
I
Power
AVDD3
3.3 V Analog (DAC) Power Supply.
17, 18
I
Power
AVDD
1.8 V Analog (DAC) Power Supply.
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