參數(shù)資料
型號: AD9520-2/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 74/80頁
文件大?。?/td> 0K
描述: BOARD EVAL AD9520-2
設計資源: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
Phase Coherent FSK Modulator (CN0186)
AD9520 Eval Brd Schematic
AD9520 BOM
標準包裝: 1
主要目的: 計時,時鐘發(fā)生器
已用 IC / 零件: AD9520-2
已供物品:
AD9520-2
Data Sheet
Rev. A | Page 76 of 80
Table 61. EEPROM Control
Reg.
Addr.
(Hex) Bits Name
Description
0xB00 [7:1] Unused
Unused.
0
STATUS_EEPROM
(read only)
This read-only register indicates the status of the data transfer between the EEPROM and the buffer register
bank during the writing and reading of the EEPROM. This signal is also available at the STATUS pin when
Register 0x01D[7] is set.
0: data transfer is complete.
1: data transfer is not complete.
0xB01 [7:1] Unused
Unused.
0
EEPROM
data error
(read only)
This read-only register indicates an error during the data transfer between the EEPROM and the buffer.
0: no error. Data is correct.
1: incorrect data detected.
0xB02 [7:2] Unused
Unused.
1
SOFT_EEPROM
When the EEPROM pin is tied low, setting SOFT_EEPROM resets the AD9520 using the settings saved in the
EEPROM.
1: soft reset with EEPROM settings (self-clearing).
0
Enable EEPROM
write
Enables the user to write to the EEPROM.
0: EEPROM write protection is enabled. User cannot write to the EEPROM (default).
1: EEPROM write protection is disabled. User can write to the EEPROM. Once an EEPROM save/load transfer is
complete, the user must wait a minimum of 10 s before starting the next EEPROM save/load transfer.
0xB03 [7:1] Unused
Unused.
0
REG2EEPROM
Transfers data from the buffer register to the EEPROM (self-clearing).
1: setting this bit initiates the data transfer from the buffer register to the EEPROM (writing process);
it is reset by the IC master after the data transfer is complete. Once an EEPROM save/load transfer is
complete, the user must wait a minimum of 10 s before starting the next EEPROM save/load transfer.
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