參數(shù)資料
型號: AD9148BBCZRL
廠商: Analog Devices Inc
文件頁數(shù): 1/72頁
文件大小: 0K
描述: IC DAC 16BIT QD 1GSPS 196CSPBGA
標(biāo)準(zhǔn)包裝: 1,500
系列: TxDAC+®
設(shè)置時(shí)間: 20ns
位數(shù): 16
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 模擬和數(shù)字
功率耗散(最大): 2.22W
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 196-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 196-CSPBGA(12x12)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 8 電流,單極
采樣率(每秒): 1G
Quad 16-Bit,1 GSPS,
TxDAC+ Digital-to-Analog Converter
Data Sheet
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2010–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF
Channel-to-channel isolation > 90 dB
Analog output
Adjustable 8.7 mA to 31.7 mA
RL = 25 Ω to 50 Ω
Novel 2×, 4×, and 8× interpolator eases data interface
On-chip fine complex NCO allows carrier placement
anywhere in DAC bandwidth
High performance, low noise PLL clock multiplier
Multiple chip synchronization interface
Programmable digital inverse sinc filter
Auxiliary DACs allow for offset control
Gain DACs allow for I and Q gain matching
Programmable I and Q phase compensation
Digital gain control
Flexible LVDS digital I/F supports 32- or 16-bit bus width
196-ball CSP_BGA, 12 mm × 12 mm
APPLICATIONS
Wireless infrastructure
LTE, TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM
MIMO/transmit diversity
Digital high or low IF synthesis
GENERAL DESCRIPTION
The AD9148 is a quad, 16-bit, high dynamic range, digital-to-
analog converter (DAC) that provides a sample rate of 1000 MSPS.
This device includes features optimized for direct conversion
transmit applications, including gain, phase, and offset compen-
sation. The DAC outputs are optimized to interface seamlessly with
analog quadrature modulators such as the ADL5371/ADL5372/
ADL5373/ADL5374/ADL5375. A serial peripheral interface (SPI)
is provided for programming of the internal device parameters.
Full-scale output current can be programmed over a range of 8.7 mA
to 31.7 mA. The device operates from 1.8 V and 3.3 V supplies
for a total power consumption of 3 W at the maximum sample
rate. The AD9148 is enclosed in a 196-ball chip scale package ball
grid array with the option of an attached heat spreader.
PRODUCT HIGHLIGHTS
1. Low noise and intermodulation distortion (IMD) enable
high quality synthesis of wideband signals from baseband
to high intermediate frequencies.
2. A proprietary DAC output switching technique enhances
dynamic performance.
3. The current outputs are easily configured for various
single-ended or differential circuit topologies.
4. The LVDS data input interface includes FIFO to ease input
timing.
TYPICAL SIGNAL CHAIN
FPGA/ASIC/DSP
NOTES
1. AQM = ANALOG QUADRATURE MODULATOR.
DC
COMPLEX BASEBAND
COMPLEX IF
RF
fIF
LO ±
fIF
DAC1
DAC2
DIGITAL INTERPOLATION FILTERS
POST DAC
ANALOG FILTER
DAC3
DAC4
POST DAC
AQM
LO
AQM
↑2
PA
LO
08910-
001
Figure 1.
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