- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375236 > AD7471 (Analog Devices, Inc.) 1.4us，642μW Micropower12-Bit Parallel ADC(12位高速,低耗,逐次逼近式A/D轉(zhuǎn)換器) PDF資料下載
參數(shù)資料
| 型號： | AD7471 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 1.4us，642μW Micropower12-Bit Parallel ADC(12位高速,低耗,逐次逼近式A/D轉(zhuǎn)換器) |
| 中文描述： | 1.4us，642μWMicropower12位并行ADC（12位高速，低耗，逐次逼近式的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 203K |
| 代理商： | AD7471 |
AD7471
–8–
REV. PrB
Prelimnary Technical Data
PRELMNARY
DATA
TECHNCAL
D A C
C IR C UIT D E SC R IP T ION
C ONV E R T E R OP E R A T ION
T he AD7471 is a 12-bit successive approximation analog-
to-digital converter based around a capacitive DAC. T he
AD7471 can convert analog input signals in the range 0 V
to V
REF
. Figure 2 shows a very simplified schematic of the
ADC. T he C ontrol L ogic, SAR and the C apacitive
DAC are used to add and subtract fixed amounts of
charge from the sampling capacitor to bring the compara-
tor back into a balanced condition.
T Y P IC A L C ONNE C T ION D IA G R A M
Figure 5 shows a typical connection diagram for the
AD7471. Conversion is initiated by a falling edge on
CONVST
. Once
CONVST
goes low the BUSY signal
goes high, and at the end of conversion the falling edge of
BUSY is used to activate an Interrupt Service Routine.
T he
CS
and
RD
lines are then activated in parallel to read
the 12-data bits. T he recommended REF IN voltage is 2.5
V providing an analog input range of 0 V to 2.5 V, mak-
ing the AD7471 a unipolar A/D. It is recommended to
perform a dummy conversion after power-up as the first
conversion result could be incorrect. T his also ensures
that the part is in the correct mode of operation. T he
CONVST
pin should not be floating when power is ap-
might not wake up the
part.
In Figure 5 the V
DRIVE
pin is tied to DV
DD
,
which results in
logic output voltage values being either 0 V or DV
DD
. T he
voltage applied to V
DRIVE
controls the voltage value of the
output logic signals. For example, if DV
DD
is supplied by
a 5 V supply and V
DRIVE
by a 3 V supply, the logic output
voltage levels would be either 0 V or 3 V. T his feature
allows the AD7471 to interface to 3 V parts while still
enabling the A/D to process signals at 5 V supply.
Figure 2. Simplified Block Diagram of AD7471
Figure 3 shows the ADC during its acquisition phase.
SW2 is closed and SW1 is in Position A. T he comparator
is held in a balanced condition and the sampling capacitor
acquires the signal on V
IN
.
CAPACITIVE
DAC
SWITCHES
SAR
CONTROL LOGIC
COMPARATOR
OUTPUT DATA
10-/12-BIT PARALLEL
V
IN
V
REF
CONTROL
INPUTS
C OM P A R A T OR
V
IN
C ON T R OL L OG IC
C A PA C IT IV E
A G N D
2k
V
SW 2
SW 1
A
B
Figure 3. ADC Acquisition Phase
Figure 4 shows the ADC during conversion. When con-
version starts SW2 will open and SW1 will move to posi-
tion B, causing the comparator to become unbalanced.
T he ADC then runs through its successive approximation
routine and brings the comparator back into a balanced
condition. When the comparator is rebalanced, the con-
version result is available in the SAR register.
C OM PAR AT OR
V
IN
C ON T R OL L OG IC
C APA C IT IV E
D AC
AG N D
2k
V
SW 2
SW 1
A
B
Figure 4. ADC Conversion Phase
Figure 5. T ypical Connection Diagram
10
m
F
0.1
m
F
PA R AL L E D
IN T E RF A C E
+ 2.5V *
*R E C OM M E N D E D R E F IN V O L T A G E
0V T O
RE F IN
1nF
10
m
F
0.1
m
F
47
m
F
AD 7471
AV
D D
V
D R IV E
D V
D D
RE F IN
D B0-
D B9 (D B11)
CS
BU SY
CONVST
RD
V
IN
m
C /
m
P
AN AL OG
SU PPL Y
2.7V -5.25V
+
+
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7485 | 1 MSPS, Serial 14-Bit SAR ADC |
| AD7485BST | 1 MSPS, Serial 14-Bit SAR ADC |
| AD75019JP | 16 x 16 Crosspoint Switch Array |
| AD75019 | Crosspoint Switch Array(16×16正交開關(guān)陣列) |
| AD7506KN | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7472 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AD7470/AD7472: 1.75MSPS. 4mW 10-Bit/12-Bit SAR ADC Data Sheet (Rev. A. 3/00) |
| AD7472AR | 功能描述:IC ADC 12BIT PARALLEL 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7472AR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 1.5Msps 12-bit Parallel 24-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:12 BIT 1.5MSPS PARALLEL ADC I.C. - Tape and Reel |
| AD7472AR-REEL7 | 功能描述:IC ADC 12BIT PARALLEL 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7472ARU | 功能描述:IC ADC 12BIT PARALLEL 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。