參數(shù)資料
型號(hào): AD7471
廠商: Analog Devices, Inc.
英文描述: 1.4us,642μW Micropower12-Bit Parallel ADC(12位高速,低耗,逐次逼近式A/D轉(zhuǎn)換器)
中文描述: 1.4us,642μWMicropower12位并行ADC(12位高速,低耗,逐次逼近式的A / D轉(zhuǎn)換器)
文件頁(yè)數(shù): 1/13頁(yè)
文件大小: 203K
代理商: AD7471
AD7471
a
Prelimnary Technical Data
REV. PrB 8/99
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, PO. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
1.4us, 642μW
Mcropower 12-Bit Parallel ADC
facing to microprocessors or DSPs. T he input signal is
sampled on the falling edge of
CONVST
and conversion
is also initiated at this point. T he BUSY goes high at the
start of conversion and goes low 1.4us later to indicate
that the conversion is complete. T here are no pipelined
delays associated with the part. T he conversion result is
accessed via standard
CS
and
RD
signals over a high
speed parallel interface.
T he AD7471 uses advanced design techniques to achieve
extremely low power dissipation at a 100K Hz throughput
rate. With 3V supplies and 100K SPS throughput rate, the
parts consume just 167μA. With 5V supplies and
100K SPS, the current consumption is 213μA. T he part
also offers flexible power/throughput rate management.
It is also possible to operate the parts in an auto shutdown
mode, where the part powers up to do a conversion and auto-
matically enters shutdown mode at the end of conversion.
Using this method allows very low power dissipation numbers
at lower throughput rates.
TECHNCAL
F UNC T IONA L BL OC K D IA GR A M
FEATURES
Specified for V
DD
of 2.7 V to 5.25 V
600KSPS for AD7471 (12-Bit)
Low Power:
500μW max per cycle for 100KSPS @ 3V Supplies
1.065mW max per cycle for 100KSPS @ 5V Supplies
Input Bandwidth = 50KHz
70dB typ SNR at 10kHz Input Frequency
Flexible Power/Throughput Rate Management
No Pipeline Delays
High Speed Parallel Interface
Sleep Mode: 50
n
A typ.
24-Pin SOIC and TSSOP Packages
G E NE R A L D E SC R IP T ION
T he AD7471 is a 12-bit high speed, low power, succes-
sive-approximation ADC. T he part operates from a single
2.7 V to 5.25 V power supply and feature throughput rates
up to 600K SPS. T he part contains a low-noise track/hold
amplifier which can handle input frequencies up to
50K H z.
T he conversion process and data acquisition are con-
trolled using standard control inputs allowing easy inter-
T he analog input range for the part is 0 to REF IN. T he
+2.5V reference is applied externally to the REF IN pin.
T he conversion rate is determined by the externally-ap-
plied clock.
P R OD UC T H IG H L IG H T S
1.100K Hz T hroughput with very Low Power Consump-
tion.
2.Flexible Power/T hroughput Rate Management
T he conversion rate is determined by an externally-applied
clock allowing the power to be reduced as the conversion rate
is reduced. T he part also features an autoshutdown mode to
maximize power efficiency at lower throughput rates.
3.No Pipeline Delay.
T he part features a standard successive-approximation ADC
with accurate control of the sampling instant via a
CONVST
input and once off conversion control.
AD7471 is a 12 Bit part with DB0 to DB11 as outputs
T/H
VIN
AD7471
AVDD
12-BIT SUCCESSIVE
APPROXIMATION ADC
REF IN
DB0
DB11
CLK IN
CONTROL LOGIC
CONVST
OUTPUT DRIVERS
VDRIVE
BUSY
C S
RD
AGND
DGND
DVDD
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