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參數(shù)資料
| 型號： | AD1846JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 26/28頁 |
| 文件大?。?/td> | 277K |
| 代理商： | AD1846JP |
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AD1846
REV. A
–26–
Figure 21 illustrates reference bypassing. V
REF
_F should only be
connected to its bypass capacitors.
10
μ
F
10
μ
F
V
REF
0.1
μ
F
V
REF
F
_
Figure 21. Voltage Reference Bypassing
Figure 22 illustrates signal-path filtering capacitors, L_FILT
and R_FILT . T he 1.0
μ
F capacitors required by the AD1846
can be of any type. Note that AD1846s will perform satisfacto-
rily with 0.1
μ
F capacitors; however, low frequency performance
will be degraded.
R_FILT
1.0
μ
F
L_FILT
1.0
μ
F
Figure 22. External Filter Capacitor Connections
T he crystals shown in the crystal connection circuitry of Figure
23 should be fundamental-mode and parallel-tuned. Note that
using the exact data sheet frequencies is not required and that
external clock sources can be used to drive the crystal inputs.
(See the description of the CFS2:0 control bits above.) If using
an external clock source, apply it to the crystal input pins while
leaving the crystal output pins unconnected. Attention should
be paid to providing low jitter external input clocks.
XTAL1O
XTAL1I
20–64pF
24.576MHz
20–64pF
XTAL2O
XTAL2I
20–64pF
16.9344MHz
20–64pF
Figure 23. Crystal Connections
Low cost ceramic resonators may be substituted for the crystals
to supply the time base to the AD1846.
Analog Devices recommends a pull-down resistor for
PWRDWN
.
Good, standard engineering practices should be applied for
power supply decoupling. Decoupling capacitors should be
place as close as possible to package pins. If a separate analog
power supply is not available, we recommend the circuit shown
in Figure 24 for using a single +5 V supply. T his circuitry
should be as close to the supply pins as is practical.
+5V SUPPLY
1.6
1
μ
F
0.1
μ
F
V
DD
0.1
μ
F
FERRITE/INDUCTOR
V
CC
V
DD
0.1
μ
F
V
DD
0.1
μ
F
V
DD
0.1
μ
F
V
DD
0.1
μ
F
V
DD
0.1
μ
F
V
DD
0.1
μ
F
0.1
μ
F
0.1
μ
F
1
μ
F
V
CC
1
μ
F
FERRITE/INDUCTOR
Figure 24. Recommended Power Supply Bypassing
Analog Devices recommends a split ground plane as shown in
Figure 25. T he analog plane and the digital plane are connected
directly under the AD1846. Splitting the ground plane directly
under the SoundPort Codec is optimal because analog pins will
be located above the analog ground plane and digital pins will
be located directly above the digital ground plane for the best
isolation. T he digital ground and analog grounds should be tied
together in the vicinity of the AD1846. Other schemes may also
yield satisfactory results. If the split ground plane recommended
here is not possible, the AD1846 should be entirely over the
analog ground plane with the 74_245 transceiver over the digital
plane.
DIGITAL GROUND PLANE
ANALOG GROUND PLANE
GNDD
R_AUX2
AD1846
GNDD
R_FILT
Figure 25. Recommended Ground Plane
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1846JP-REEL | 制造商:Analog Devices 功能描述: |
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| AD1847JP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1847JP-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD1847JST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial-Port 16-Bit SoundPort Stereo Codec |
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