參數(shù)資料
型號： AD1816AJS
廠商： ANALOG DEVICES INC
元件分類： 消費家電
英文描述： SoundPort Controller
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： PLASTIC, QFP-100
文件頁數(shù)： 43/52頁
文件大小： 477K
代理商： AD1816AJS
AD1816A
–43–
REV. A
AD1816A FLAG BY T E S
T he AD1816A has four flag bytes that are used as shown below:
(*) AD1816-compatible setting.
Byte 0
7
6
5
4
3
2
1
0
1
0
0
X T RA_HV
I
2
S0_HV
SUPER_EN
X T RA_EN
MODEM_EN
MODEM_EN
Program to one to enable the modem logical device. T his logical device has an I/O range and an IRQ.
T he I/O range has the following requirements:
– Length of eight bytes
– Alignment of eight bytes
– 16-bit address decode
Program to zero to enable I
2
S Port 1 (SUPER_EN and IRQ_EN must also be zero).
Program to one to enable the X T RA logical device. T his logical device has an I/O range, an optional
IRQ, and an optional DMA. T he I/O range has the following requirements:
– Length of 1 to 16 bytes, selectable by X T RASZ0[3:0]
– Alignment of 1 to 16 bytes, matches length
– 16-bit address decode
A second I/O range is available (see X T RA_CS). Program to zero to enable the DSP serial port (X T RA_HV
must also be zero).
Program to one to merge the X T RA and modem logical devices. If this bit is set to one, X T RA_EN and IRQ_EN
must be set to one and MODEM_EN must be set to zero. T he combined device has up to two I/O ranges, two
IRQs and one DMA. T he two I/O ranges are both taken from the X T RA device; the modem I/O range is disabled.
T he first IRQ is the X T RA device IRQ, the second is the modem IRQ. Program to zero for distinct modem and
X T RA devices. (*)
Program to one to enable hardware volume inputs on the I
2
S port 0 pins.
Program to one to enable hardware volume inputs on the DSP serial port pins. Do not enable both X T RA_HV
and I
2
S0_HV. Program to zero to enable the X T RA device DMA or the DSP serial port.
T he three MSBs in the first byte of the AD1816A EEPROM are used to verify that the EEPROM data is valid. T he bits are com-
pared to the values shown; if a mismatch is found, the EEPROM will be ignored. T he internal ROM will be used to perform PnP
enumeration, and the MODEM and X T RA logical devices will not be available. Hardware volume will be enabled on the I
2
S0
port. T he SPORT is disabled.
X T RA_EN
SUPER_EN
I
2
S0_HV
X T RA_HV
Byte 1
7
6
5
4
3
2
1
0
RESERVED
0
0
RST B_EN
IRQSEL 3_9
IRQSEL 12_13
IRQSEL12_13
Program to one to enable IRQ 13.
Program to zero to enable IRQ 12.
IRQ_EN must be one and MODEM_EN must be zero, or this bit has no effect.
Program to one to enable IRQ 9.
Program to zero to enable IRQ 3. (*)
MODEM_EN or IRQ_EN must be one, or this bit has no effect.
Program to one to enable an active-low RESET output on the X CT RLO pin.
Program to zero to enable X CT RL0/PCLK O. (*)
IRQSEL3_9
RST B_EN
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