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參數(shù)資料
| 型號： | AD1816AJS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | SoundPort Controller |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 33/52頁 |
| 文件大?。?/td> | 477K |
| 代理商： | AD1816AJS |
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AD1816A
–33–
REV. A
RS1M
LS1A [5:0]
LS1M
[07] I
2
S(0) AT T E NUAT ION
7
6
LS0M
RES
Right I
2
S(1) Mute. 0 = Unmuted, 1 = Muted.
Left I
2
S(1) Attenuation register. T he LSB represents –1.5 dB, 000000 = 0 dB and the range is 0 dB to –94.5 dB.
Left I
2
S(1) Mute. 0 = Unmuted, 1 = Muted.
DE F AUL T = [0x8080]
2
RS0A [5:0]
5
4
3
2
1
0
7
6
5
4
3
1
0
LS0A [5:0]
RS0M
RES
RS0A [5:0]
RS0M
LS0A [5:0]
LS0M
Right I
2
S(0) Attenuation register. T he LSB represents –1.5 dB, 000000 = 0 dB and the range is 0 dB to –94.5 dB.
Right I
2
S(0) Mute. 0 = Unmuted, 1 = Muted.
Left I
2
S(0) Attenuation register. T he LSB represents –1.5 dB, 000000 = 0 dB and the range is 0 dB to –94.5 dB.
Left I
2
S(0) Mute. 0 = Unmuted, 1 = Muted.
[08] PLAY BAC K BASE C OUNT
7
6
DE FAULT = [0x0000]
2
5
4
3
2
1
0
7
6
5
4
PBC [7:0]
3
1
0
PBC [15:8]
PBC [15:0]
Playback Base Count. T his register is for loading the Playback DMA Count. Writing a value to this register also
loads the same data into the Playback Current Count register. You must load this register when Playback Enable
(PEN) is deasserted. When PEN is asserted, the Playback Current Count decrements once for every four bytes
transferred via a DMA cycle. T he next transfer, after zero is reached in the Playback Current Count, will generate
an interrupt and reload the Playback Current Count with the value in the Playback Base Count. T he Playback Base
Count should always be programmed to Number Bytes divided by four, minus one ((Number Bytes/4) –1). T he
circular software DMA buffer must be divisible by four to ensure proper operation.
[09] PLAY BAC K C URRE NT C OUNT
7
6
5
DE FAULT = [0x0000]
2
4
3
2
1
0
7
6
5
4
3
1
0
PCC [15:8]
PCC [7:0]
PCC [15:0]
Playback Current Count register. Contains the current Playback DMA Count. Reads and Writes must be done
when PEN is deasserted.
[10] C APT URE BASE C OUNT
7
6
DE F AUL T = [0x0000]
2
5
4
3
2
1
0
7
6
5
4
3
1
0
CBC [15:8]
CBC [7:0]
CBC [15:0]
Capture Base Count. T his register is for loading the Capture DMA Count. Writing a value to this register also
loads the same data into the Capture Current Count register. Loading must be done when Capture Enable (CEN)
is deasserted. When CEN is asserted, the Capture Current Count decrements once for every four bytes transferred
via a DMA cycle. T he next transfer, after zero is reached in the Capture Current Count, will generate an interrupt
and reload the Capture Current Count with the value in the Capture Base Count. T he Capture Base Count should
always be programmed to Number Bytes divided by four, minus one ((Number Bytes/4) –1). T he circular software
DMA buffer must be divisible by four to ensure proper operation.
[11] C APT URE C URRE NT C OUNT
7
6
5
DE F AUL T = [0x0000]
2
4
3
2
1
0
7
6
5
4
3
1
0
CCC [15:8]
CCC [7:0]
CCC [15:0]
Capture Current Count register. Contains the current Capture DMA Count. Reading and Writing must be done
when CEN is deasserted.
[12] T IME R BASE C OUNT
7
6
DE F AUL T = [0x0000]
2
5
4
3
2
1
0
7
6
5
4
3
1
0
T BC [15:8]
T BC [7:0]
T BC [15:0]
T imer Base Count. Writing a value to this register loads data into the T imer Current Count register. Loading must
be done when T imer Enable (T E) is deasserted. When T E is asserted, the T imer Current Count register decre-
ments once for every specified time period. T he time period (10
μ
s or 100 ms) is programmed via the PT B bit in
SS [44]. When T E is asserted, the T imer Current Count decrements once every time period. T he next count, after zero
is reached in the T imer Current Count register, will generate an interrupt and reload the T imer Current Count register
with the value in the T imer Base Count register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1816AJST | SoundPort Controller |
| AD1816A | SoundPort Controller(數(shù)字音頻的聲音端口控制器) |
| AD1818 | PCI SoundComm DC97 Digital Controller(PCI SoundComm DC97型數(shù)字控制器) |
| AD1819A | AC97 SoundPort Codec(AC97型聲音端口信號編解碼器) |
| AD1819BJST | AC’97 SoundPort Codec |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ad1816ajs-eeprom | 制造商:Rochester Electronics LLC 功能描述:AD1816A SOUND PORT CONTRO - Bulk 制造商:Analog Devices 功能描述: |
| AD1816AJST | 制造商:AD 制造商全稱:Analog Devices 功能描述:SoundPort Controller |
| ad1816js3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD18-182 | 制造商:Thomas & Betts 功能描述:Terminal; 22 to 18 AWG; Brass; Non-Insulated; Tin Plated; UL 94V-2 制造商:Thomas & Betts 功能描述:DISCONNECTFEMALE 制造商:Thomas & Betts 功能描述:Quick Disconnect Terminal 18-22AWG F 21.08mm 5.84mm Tin |
| AD18-183 | 制造商:Thomas & Betts 功能描述:Terminal; 22 to 18 AWG; Brass; Nylon; Tin Plated; UL 94V-2 制造商:Thomas & Betts 功能描述:NON-INS FEM-187 DISC, 22-18 LEN .64 制造商:Thomas & Betts 功能描述:Quick Disconnect Terminal 18-22AWG F 16.26mm 5.84mm Tin |
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