參數(shù)資料
型號(hào): AD1816AJS
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: SoundPort Controller
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 31/52頁
文件大?。?/td> 477K
代理商: AD1816AJS
AD1816A
–31–
REV. A
T able VIII. Sound System Indirect Registers
(High Byte)
5
(Low Byte)
4
LBT D [7:0]
ADDRESS
00 (0x00)
01 (0x01)
02 (0x02)
03 (0x03)
04 (0x04)
05 (0x05)
06 (0x06)
07 (0x07)
08 (0x08)
09 (0x09)
10 (0x0A)
11 (0x0B)
12 (0x0C)
13 (0x0D)
14 (0x0E)
15 (0x0F)
16 (0x10)
17 (0x11)
18 (0x12)
19 (0x13)
20 (0x14)
32 (0x20)
33 (0x21)
34 (0x22)
35 (0x23)
36 (0x24)
37 (0x25)
38 (0x26)
39 (0x27)
40 (0x28)
41 (0x29 )
42 (0x2A)
43 (0x2B)
44 (0x2C)
45 (0x2D)
46 (0x2E)
7
6
4
3
2
1
0
7
6
5
3
2
1
0
RES
PIE
CIE
T IE
VIE
VPSR [15.8]
VCSR [15:8]
DIE
RIE
JIE
SIE
T E
X C1
X C0
VPSR [7:0]
VCSR [7:0]
LVM
LFMM
LS1M
LS0M
RES
RES
RES
RES
LVA [5:0]
LFMA [5:0]
LS1A [5:0]
LS0A [5:0]
RVM
RFMM
RS1M
RS0M
RES
RES
RES
RES
RVA [5:0]
RFMA [5:0]
RS1A [5:0]
RS0A [5:0]
PBC [15:8]
PCC [15:8]
CBC [15:8]
CCC [15:8]
T BC [15:8]
T CC [15:8]
PBC [7:0]
PCC [7:0]
CBC [7:0]
CCC [7:0]
T BC [7:0]
T CC [7:0]
LMVM
LCDM
LSYM
LVDM
LLM
MCM
LAGC
WSE
DS1
RES
RES
RES
RES
RES
LMVA [4:0]
LCDA [4:0]
LSYA [4:0]
LVDA [4:0]
LLA [4:0]
MCA [4:0]
RMVM
RCDM
RSYM
RVDM
RLM
PIM
RAGC
RES
RES
RES
RES
RES
RES
RMVA [4:0]
RCDA [4:0]
RSYA [4:0]
RVDA [4:0]
RLA [4:0]
PIA [3:0]
M20
RES
RES
LAS [2:0]
RES
DIT
LAG [3:0]
RES
ADR
RAS [2:0]
RAG [3:0]
CDE
DS0
CNP
COF [3:0]
PBI
I2SF1 [1:0]
I01
I2SF0 [1:0]
DFS [2:0]
RES
I1T
I0T
C PI
FMI
I1I
FMSR [7:0]
S1SR [7:0]
S0SR [7:0]
RES
PCR [7:0]
FSMR [15:8]
S1SR [15:8]
S0SR [15:8]
RES
PCR [15:8]
3DDM
RES
3DD [3:0]
RES
POM
RES
POA [4:0]
RES
RES
RES
VMU
VUP
VDN
BM [4:0]
MB0R [15:8]
MB1R [15:8]
PIR
VER [15:8]
RES
MB0R [7:0]
MB1R [7:0]
RES
VER [7:0]
RES
CPD
RES
PIW
PAA
PDA
PDP
PT B
3D
PD3D
GPSP
DM
RES
[00] INDIRE C T LOW BY T E T MP
7
6
5
DE F AUL T = [0xX X ]
2
1
4
3
2
1
0
7
6
5
4
3
0
RES
LBT D [7:0]
LBT D [7:0] Low Byte T emporary Data holding latch for register pair writes;
Written on any write to [SSBase + 2],
Read from [SSBase + 2] when the indirect address is 0x00.
[01] INT E RRUPT E NABL E AND E X T E RNAL C ONT ROL
7
6
5
4
PIE
C IE
T IE
VIE
DE F AUL T = [0x0102]
2
1
X C1
3
2
1
0
7
6
5
4
3
0
DIE
RIE
JIE
SIE
T E
RES
X C0
X C0
RW
External Control 0. T he state of this bit is reflected on the X CT L0 pin. T his pin is also muxed with
PCLK O. COF must be greater than 0x1011 for PCLK O to be disabled, see SS [32].
External Control 1. T he state of this bit is reflected on the X CT L1 pin. X CT L1 may also be used for
Ring-In Interrupt. Open drain output, contains internal pull-up ~ 0.5 mA.
T imer Enable Bit.
SoundBlaster Interrupt Enable; T his bit must be set to enable Current Count T imer.
0
SoundBlaster Interrupt disabled
1
SoundBlaster Interrupt enabled
Joystick Interrupt Enable;
0
Joystick Interrupt disabled
1
Joystick Interrupt enabled
X C1
RW
T E
SIE
RW
RW
JIE
RW
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