參數(shù)資料
型號(hào)： AD1816AJS
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： SoundPort Controller
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 42/52頁(yè)
文件大?。?/td> 477K
代理商： AD1816AJS
AD1816A
–42–
REV. A
AD1816 AND AD1816A COMPAT IBILIT Y
T he AD1816 and AD1816A are pin for pin and functionally compatible. T he AD1816A may be dropped directly into an existing
AD1816 design. However, the AD1816A has greater pin assignment flexibility to accommodate a wider range of applications and for
controlling extra logical devices such as a modem chip set or an Enhanced IDE controller. Pin assignments are controlled by the ex-
ternal EEPROM. Consequently, the optional EEPROM must be reprogrammed to configure the AD1816A.
USING AN E E PROM WIT H T HE AD1816 OR AD1816A
T he AD1816 and AD1816A support an optional Plug and Play resource ROM. If present, the ROM must be a two-wire serial de-
vice (e.g. X icor X 24C02) and the clock and data lines should be wired to EE_CLK and EE_DAT A pins; pull-up resistors are re-
quired on both signals. T he EEPROM’s A2 and A1 pins (also A0 for 256-byte EEPROMs) must all be tied to ground. T he write
control pin (WC*) must be tied to power if you wish to program the EEPROM in place; otherwise, we recommend tying it to ground
to prevent accidental writes.
T he EEPROM interface logic examines the state of the EE_CLK pin shortly after RESET is deasserted and whenever the Plug and
Play reset register (02h) is written with a value X such that ([X & 1]
≠
0). If an EEPROM is connected, EE_CLK is pulled high and
the EEPROM logic attempts to read the first ROM byte (page 0, byte 0). If EE_CLK is tied low, the internal ROM is used; in this
case EE_DAT A is used to set the state of VOL_EN, and should also be tied high or low. EE_CLK is not used as an input at any
other time.
T he initial part of the ROM is not part of the Plug and Play resource data. It consists of a number of flags that enable optional func-
tionality. T he number of flag bytes and the purpose of each bit depend on whether an AD1816 or an AD1816A is being used.
AD1816 FLAG BY T E
T he AD1816 has a single flag byte that is used as shown below:
7
6
5
4
3
2
1
0
1
0
0
X T RA_SIZE
VOL_SEL
VOL_EN
X T RA_IRQ
X T RA_EN
MODEM_EN
MODEM_EN
Program to one to enable the modem logical device. T his logical device has an I/O range and an IRQ. T he I/O
range has the following requirements:
– Length of eight bytes
– Alignment of eight bytes
– 16-bit address decode
Program to zero to enable I
2
S Port 1.
Program to one to enable the X T RA logical device. T his logical device has an I/O range, an optional IRQ, and an
optional DMA. T he I/O range has the following requirements:
– Length of eight bytes or 16 bytes, selectable by X T RA_SIZE
– Alignment of eight bytes or 16 bytes, matches length
– 16-bit address decode
Program to zero to enable the DSP serial port.
Program to one to include an IRQ in the X T RA logical device. When enabled, the IRQ level and type are pro-
grammed through PnP registers 0x70 and 0x71. (Note: For the 1816, the IRQ type is hard coded and rising edge
triggered.)
Program to one to enable hardware volume control.
T he function of this bit depends on X T RA_EN. If X T RA_EN is one, this bit selects the size of the X T RA
device’s I/O range. Program to one to make the X T RA logical device I/O length 16 bytes. Program to zero to set
the X T RA logical device I/O length to eight bytes. T he alignment specified in the resource data must be an integer
multiple of the length. If X T RA_EN is zero (and VOL_EN is one), then this bit selects the location of the hard-
ware volume control pins. Program to zero to replace I
2
S0 with the volume control pins; program to one to re-
place the SPORT .
T he three MSBs in the first byte of the AD1816 EEPROM are used to verify that the EEPROM data is valid. T he bits are compared
to the values shown; if a mismatch is found, then the EEPROM will be ignored. T he internal ROM will be used to perform PnP
enumeration, and the MODEM and X T RA logical devices will not be available. Hardware volume will be enabled on the I
2
S0 port.
T he SPORT is disabled.
X T RA_EN
X T RA_IRQ
VOL_EN
X T RA_SIZE/
VOL_SEL
USING T HE AD1816 WIT HOUT AN E E PROM
If the EEPROM is absent (EE_CLK pin = GND), the flags are set as shown below:
MODEM_EN = X T RA_EN = X T RA_IRQ = VOL_SEL = 0
VOL_EN = EE_DAT A pin
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ad1816ajs-eeprom 制造商:Rochester Electronics LLC 功能描述:AD1816A SOUND PORT CONTRO - Bulk 制造商:Analog Devices 功能描述:
AD1816AJST 制造商:AD 制造商全稱:Analog Devices 功能描述:SoundPort Controller
ad1816js3 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:
AD18-182 制造商:Thomas & Betts 功能描述:Terminal; 22 to 18 AWG; Brass; Non-Insulated; Tin Plated; UL 94V-2 制造商:Thomas & Betts 功能描述:DISCONNECTFEMALE 制造商:Thomas & Betts 功能描述:Quick Disconnect Terminal 18-22AWG F 21.08mm 5.84mm Tin
AD18-183 制造商:Thomas & Betts 功能描述:Terminal; 22 to 18 AWG; Brass; Nylon; Tin Plated; UL 94V-2 制造商:Thomas & Betts 功能描述:NON-INS FEM-187 DISC, 22-18 LEN .64 制造商:Thomas & Betts 功能描述:Quick Disconnect Terminal 18-22AWG F 16.26mm 5.84mm Tin
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