參數(shù)資料
型號: AD1816AJS
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: SoundPort Controller
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 13/52頁
文件大?。?/td> 477K
代理商: AD1816AJS
AD1816A
–13–
REV. A
Muxed Serial Ports (
8 mA Drivers)
Pin Name
PQFP
T QFP
I/O
Description
I
2
S(0)_BCLK *
I
2
S(0)_LRCLK *
I
2
S(0)_DAT A*
I
2
S(1)_BCLK *
I
2
S(1)_LRCLK *
I
2
S(1)_DAT A*
SPORT _SDI*
SPORT _SCLK *
SPORT _SDFS*
SPORT _SDO*
3
2
1
82
83
81
100
97
98
99
1
100
99
80
81
79
98
95
96
97
I
I
I
I
I
I
I
O
O
O
I
2
S (0) Bit Clock.
I
2
S (0) Left/Right Clock.
I
2
S (0) Serial Data Input.
I
2
S (1) Bit Clock.
I
2
S (1) Left/Right Clock.
I
2
S (1) Serial Data Input.
Serial Port Digital Serial Input.
Serial Port Serial Clock.
Serial Port Serial Data Frame Synchronization.
Serial Port Serial Data Output.
Miscellaneous Analog Pins
Pin Name
PQFP
T QFP
I/O
Description
V
REF_X
36
34
O
Voltage Reference. Nominal 2.25 volt reference available for dc-coupling
and level-shifting. V
REF_X
should not be used to sink or source signal current.
V
REF_X
should be bypassed with 10
μ
F and 0.1
μ
F parallel capacitors.
Voltage Reference Filter. Voltage reference filter point for external bypassing
only. V
REF
should be bypassed with 10
μ
F and 0.1
μ
F parallel capacitors.
Left Channel Filter. Requires a 1.0
μ
F to analog ground for proper
operation.
Right Channel Filter. Requires a 1.0
μ
F to analog ground for proper
operation.
L eft Channel Antialias Filter. T his pin requires a 560 pF NPO
capacitor to analog ground for proper operation.
Right Channel Antialias Filter. T his pin requires a 560 pF NPO
capacitor to analog ground for proper operation.
V
REF
35
33
I
L_FILT
38
36
I
R_FILT
37
35
I
L_AAFILT
40
38
I
R_AAFILT
39
37
I
C rystal Pin
Pin Name
PQFP
T QFP
I/O
Description
X T ALO
64
62
O
33 MHz Crystal Output. If no Crystal is present leave X T AL O
unconnected.
33 MHz Clock. When using a crystal as a clock source, the crystal should
be connected between the X T ALI and X T ALO pins. Clock input may
be driven into X T ALI in place of a crystal. When using an external clock,
V
IH
must be 2.4 V rather than the V
IH
of 2.0 V specified for all other
digital inputs.
X T ALI
63
61
I
E xternal Logical Devices
Pin Name
PQFP
T QFP
I/O
Description
LD_IRQ*
LD_DACK *
LD_DRQ*
LD_SEL
*
MDM_SEL
*
MDM_IRQ
*
LD_SEL1
*
PNPRST
*
100
99
98
97
83
82
69
68
98
97
96
95
81
82
67
66
I
O
I
O
O
I
O
O
Logical Device IRQ.
Logical Device DACK .
Logical Device DRQ.
Logical Device Select.
Modem Chip Set Select.
Modem Chip Set IRQ.
Logical Device (1) Select.
Plug and Play Reset.
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