P ack ag e Mec h a n i c a l Dr awi n gs (continued) 176- P i n CP GA Notes: 1. All" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A1020B-1VQ80C
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 92/98闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 2K GATES 80-VQFP COM
妯欐簴鍖呰锛� 90
绯诲垪锛� ACT™ 1
LAB/CLB鏁�(sh霉)锛� 547
杓稿叆/杓稿嚭鏁�(sh霉)锛� 69
闁€鏁�(sh霉)锛� 2000
闆绘簮闆诲锛� 4.5 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 80-TQFP
渚涙噳鍟嗚ō鍌欏皝瑁濓細 80-VQFP锛�14x14锛�
92
P ack ag e Mec h a n i c a l Dr awi n gs (continued)
176- P i n CP GA
Notes:
1.
All dimensions are in inches unless otherwise stated.
2.
BSC鈥擝asic Spacing between Centers. This is a theoretical true position dimension and so has no tolerance.
INDEX MARK
0.018" 卤 .002"
0.102"
0.132"
0.050" 卤 .005"
1.400 BSC
0.100" BSC
1.570"
卤 .015" square
0.120"
0.140"
11 12 13 14 15
10
9
8
7
6
5
4
3
2
1
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
鐩搁棞PDF璩囨枡
PDF鎻忚堪
A10V20B-VQ80C IC FPGA 2K GATES 80-VQFP COM
A1020B-1VQG80C IC FPGA 2K GATES 80-VQFP COM
FMC17DRYI-S734 CONN EDGECARD 34POS DIP .100 SLD
ESC65DRYS-S734 CONN EDGECARD 130PS DIP .100 SLD
RSC31DTES CONN EDGECARD 62POS .100 EYELET
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鍙冩暩(sh霉)鎻忚堪
A1020B-1VQ80I 鍔熻兘鎻忚堪:IC FPGA 2K GATES 80-VQFP IND RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 鐗硅壊鐢�(ch菐n)鍝�:Cyclone? IV FPGAs 妯欐簴鍖呰:60 绯诲垪:CYCLONE® IV GX LAB/CLB鏁�(sh霉):9360 閭忚集鍏冧欢/鍠厓鏁�(sh霉):149760 RAM 浣嶇附瑷�:6635520 杓稿叆/杓稿嚭鏁�(sh霉):270 闁€鏁�(sh霉):- 闆绘簮闆诲:1.16 V ~ 1.24 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 85°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FBGA锛�23x23锛�
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