A1 42 5A T i m i n g C har a c t e r i st i c s (continued) (W or" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A1020B-1VQ80C
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 33/98闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 2K GATES 80-VQFP COM
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� ACT™ 1
LAB/CLB鏁�(sh霉)锛� 547
杓稿叆/杓稿嚭鏁�(sh霉)锛� 69
闁€鏁�(sh霉)锛� 2000
闆绘簮闆诲锛� 4.5 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 80-TQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 80-VQFP锛�14x14锛�
39
Hi R e l F P GA s
A1 42 5A T i m i n g C har a c t e r i st i c s (continued)
(W or s t - C as e M i l i t a r y Cond i t i o n s , V CC = 4.5 V, TJ = 1 25掳C)
鈥樷€�1鈥� Speed
鈥楽td鈥� Speed
Parameter
Description
Min.
Max.
Min.
Max.
Units
Routed Array Clock Networks
tRCKH
Input Low to High (FO=64)
5.5
6.4
ns
tRCKL
Input High to Low (FO=64)
6.0
7.0
ns
tRPWH
Min. Pulse Width High (FO=64)
4.9
5.7
ns
tRPWL
Min. Pulse Width Low (FO=64)
4.9
5.7
ns
tRCKSW
Maximum Skew (FO=128)
1.1
1.2
ns
tRP
Minimum Period (FO=64)
10.1
11.6
ns
fRMAX
Maximum Frequency (FO=64)
100
85
MHz
Clock-to-Clock Skews
tIOHCKSW
I/O Clock to H-Clock Skew
0.0
3.0
0.0
3.0
ns
tIORCKSW
I/O Clock to R-Clock Skew
0.0
3.0
0.0
3.0
ns
tHRCKSW
H-Clock to R-Clock Skew
(FO = 64)
(FO = 50% max.)
0.0
1.0
3.0
0.0
1.0
3.0
ns
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
A10V20B-VQ80C IC FPGA 2K GATES 80-VQFP COM
A1020B-1VQG80C IC FPGA 2K GATES 80-VQFP COM
FMC17DRYI-S734 CONN EDGECARD 34POS DIP .100 SLD
ESC65DRYS-S734 CONN EDGECARD 130PS DIP .100 SLD
RSC31DTES CONN EDGECARD 62POS .100 EYELET
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
A1020B-1VQ80I 鍔熻兘鎻忚堪:IC FPGA 2K GATES 80-VQFP IND RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪锛� 绯诲垪:ACT™ 1 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 鐗硅壊鐢�(ch菐n)鍝�:Cyclone? IV FPGAs 妯�(bi膩o)婧�(zh菙n)鍖呰:60 绯诲垪:CYCLONE® IV GX LAB/CLB鏁�(sh霉):9360 閭忚集鍏冧欢/鍠厓鏁�(sh霉):149760 RAM 浣嶇附瑷�:6635520 杓稿叆/杓稿嚭鏁�(sh霉):270 闁€鏁�(sh霉):- 闆绘簮闆诲:1.16 V ~ 1.24 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 85°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FBGA锛�23x23锛�
A1020B-1VQ84B 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs
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A1020B-1VQ84I 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs
A1020B-1VQ84M 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs
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