- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗4430 > A1020B-1VQ80C (Microsemi SoC)IC FPGA 2K GATES 80-VQFP COM PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | A1020B-1VQ80C |
| 寤犲晢锛� | Microsemi SoC |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 3/98闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC FPGA 2K GATES 80-VQFP COM |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 90 |
| 绯诲垪锛� | ACT™ 1 |
| LAB/CLB鏁�(sh霉)锛� | 547 |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 69 |
| 闁€鏁�(sh霉)锛� | 2000 |
| 闆绘簮闆诲锛� | 4.5 V ~ 5.5 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 灏佽/澶栨锛� | 80-TQFP |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 80-VQFP锛�14x14锛� |
绗�1闋�(y猫)绗�2闋�(y猫)鐣�(d膩ng)鍓嶇3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)绗�24闋�(y猫)绗�25闋�(y猫)绗�26闋�(y猫)绗�27闋�(y猫)绗�28闋�(y猫)绗�29闋�(y猫)绗�30闋�(y猫)绗�31闋�(y猫)绗�32闋�(y猫)绗�33闋�(y猫)绗�34闋�(y猫)绗�35闋�(y猫)绗�36闋�(y猫)绗�37闋�(y猫)绗�38闋�(y猫)绗�39闋�(y猫)绗�40闋�(y猫)绗�41闋�(y猫)绗�42闋�(y猫)绗�43闋�(y猫)绗�44闋�(y猫)绗�45闋�(y猫)绗�46闋�(y猫)绗�47闋�(y猫)绗�48闋�(y猫)绗�49闋�(y猫)绗�50闋�(y猫)绗�51闋�(y猫)绗�52闋�(y猫)绗�53闋�(y猫)绗�54闋�(y猫)绗�55闋�(y猫)绗�56闋�(y猫)绗�57闋�(y猫)绗�58闋�(y猫)绗�59闋�(y猫)绗�60闋�(y猫)绗�61闋�(y猫)绗�62闋�(y猫)绗�63闋�(y猫)绗�64闋�(y猫)绗�65闋�(y猫)绗�66闋�(y猫)绗�67闋�(y猫)绗�68闋�(y猫)绗�69闋�(y猫)绗�70闋�(y猫)绗�71闋�(y猫)绗�72闋�(y猫)绗�73闋�(y猫)绗�74闋�(y猫)绗�75闋�(y猫)绗�76闋�(y猫)绗�77闋�(y猫)绗�78闋�(y猫)绗�79闋�(y猫)绗�80闋�(y猫)绗�81闋�(y猫)绗�82闋�(y猫)绗�83闋�(y猫)绗�84闋�(y猫)绗�85闋�(y猫)绗�86闋�(y猫)绗�87闋�(y猫)绗�88闋�(y猫)绗�89闋�(y猫)绗�90闋�(y猫)绗�91闋�(y猫)绗�92闋�(y猫)绗�93闋�(y猫)绗�94闋�(y猫)绗�95闋�(y猫)绗�96闋�(y猫)绗�97闋�(y猫)绗�98闋�(y猫)
11
Hi R e l F P GA s
P ack ag e Th er m a l Ch ar ac t e r i st i c s
The device junction to case thermal characteristic is
胃
jc, and
the junction to ambient air characteristic is
胃
ja. The thermal
characteristics for
胃
ja are shown with two different air flow
rates.
Maximum junction temperature is 150掳C.
A sample calculation of the absolute maximum power
dissipation allowed for a CPGA 176-pin package at military
temperature is as follows:
P o w e r D i ss ip a t io n
Gener al P o w e r E quat i o n
P = [ICCstandby + ICCactive] * VCC + IOL * VOL * N +
IOH * (VCC 鈥� VOH) * M
where:
ICCstandby is the current flowing when no inputs or outputs
are changing.
ICCactive is the current flowing due to CMOS switching.
IOL, IOH are TTL sink/source currents.
VOL, VOH are TTL level output voltages.
N equals the number of outputs driving TTL loads to
VOL.
M equals the number of outputs driving TTL loads to
VOH.
Accurate values for N and M are difficult to determine
because they depend on the family type, on the design, and on
the system I/O. The power can be divided into two
components鈥攕tatic and active.
S tat i c P o w e r Co m ponen t
Actel FPGAs have small static power components that result
in power dissipation lower than that of PALs or PLDs. By
integrating multiple PALs or PLDs into one FPGA, an even
greater reduction in board-level power dissipation can be
achieved.
The power due to standby current is typically a small
component of the overall power. Standby power is calculated
below for commercial, worst-case conditions.
The static power dissipated by TTL loads depends on the
number of outputs driving high or low and the DC load
current. Again, this value is typically small. For instance, a
32-bit bus sinking 4 mA at 0.33V will generate 42 mW with all
outputs driving low, and 140 mW with all outputs driving high.
Ac ti v e P ower Com p o nent
Power dissipation in CMOS devices is usually dominated by
the active (dynamic) power dissipation. This component is
frequency dependent, a function of the logic and the external
I/O. Active power dissipation results from charging internal
chip capacitances of the interconnect, unprogrammed
antifuses, module inputs, and module outputs, plus external
capacitance due to PC board traces and load device inputs.
An additional component of the active power dissipation is
the totempole current in CMOS transistor pairs. The net
effect can be associated with an equivalent capacitance that
Package Type
Pin Count
胃
jc
胃
ja
Still Air
胃
ja
300 ft/min
Units
Ceramic Pin Grid Array
84
132
133
176
207
257
6.0
4.8
4.6
3.5
2.8
33
25
23
21
15
20
16
15
12
10
8
掳C/W
Ceramic Quad Flat Pack
84
132
172
196
256
7.8
7.2
6.8
6.4
6.2
40
35
25
23
20
30
25
20
15
10
掳C/W
Max. junction temp. (掳C) 鈥� Max. military temp.
胃
ja (掳C/W)
------------------------------------------------------------------------------------------------------------------
150掳C 鈥� 125掳C
23掳C/W
------------------------------------
1.1 W
==
Family
ICC
VCC
Power
ACT 3
2 mA
5.25V
10.5 mW
1200XL/3200DX
2 mA
5.25V
10.5 mW
ACT 2
2 mA
5.25V
10.5 mW
ACT 1
3 mA
5.25V
15.8 mW
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| A10V20B-VQ80C | IC FPGA 2K GATES 80-VQFP COM |
| A1020B-1VQG80C | IC FPGA 2K GATES 80-VQFP COM |
| FMC17DRYI-S734 | CONN EDGECARD 34POS DIP .100 SLD |
| ESC65DRYS-S734 | CONN EDGECARD 130PS DIP .100 SLD |
| RSC31DTES | CONN EDGECARD 62POS .100 EYELET |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| A1020B-1VQ80I | 鍔熻兘鎻忚堪:IC FPGA 2K GATES 80-VQFP IND RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛� 绯诲垪:ACT™ 1 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 鐗硅壊鐢�(ch菐n)鍝�:Cyclone? IV FPGAs 妯�(bi膩o)婧�(zh菙n)鍖呰:60 绯诲垪:CYCLONE® IV GX LAB/CLB鏁�(sh霉):9360 閭忚集鍏冧欢/鍠厓鏁�(sh霉):149760 RAM 浣嶇附瑷�(j矛):6635520 杓稿叆/杓稿嚭鏁�(sh霉):270 闁€鏁�(sh霉):- 闆绘簮闆诲:1.16 V ~ 1.24 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 85°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FBGA锛�23x23锛� |
| A1020B-1VQ84B | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs |
| A1020B-1VQ84C | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs |
| A1020B-1VQ84I | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs |
| A1020B-1VQ84M | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs |
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