參數(shù)資料
型號(hào): 82595TX
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝: TQFP-144
文件頁數(shù): 10/54頁
文件大?。?/td> 643K
代理商: 82595TX
82595FX
2.5 Serial Interface
(Continued)
Symbol
Pin
No.
Type
Name and Function
RCV
116
I
The negative input to a differential amplifier connected to the RCV pair of the
AUI cable (Data In B). It is driven with 10 Mb/s Manchester Encoded data.
CLSN
124
I
The positive input to a differential amplifier connected to the CLSN pair of the
AUI cable (Collision In A).
CLSN
125
I
The negative input to a differential amplifier connected to the CLSN pair of the
AUI cable (Collision In B).
TDH
105
O
TRANSMIT DATA HIGH:
Active high Manchester Encoded data to be
transmitted onto the twisted pair. This signal is used in conjunction with TDL,
TDH, and TDL to generate the pre-conditioned twisted pair output waveform.
TDL
106
O
TRANSMIT DATA LOW:
Twisted Pair Output Driver. Active high Manchester
Encoded data with embedded pre-distortion information to be transmitted onto
the twisted pair. This signal is used in conjunction with TDH, TDH, and TDL to
generate the pre-conditioned twisted pair output waveform.
TDH
103
O
TRANSMIT DATA HIGH INVERT:
Active low Manchester Encoded data to be
transmitted onto the twisted pair. This signal is used in conjunction with TDL,
TDH, and TDL to generate the pre-conditioned twisted pair output waveform.
TDL
104
O
TRANSMIT DATA LOW INVERT:
Twisted Pair Output Driver. Active low
Manchester Encoded data with embedded pre-distortion information to be
transmitted onto the twisted pair. This signal is used in conjunction with TDL,
TDH, and TDH to generate the pre-conditioned twisted pair output waveform.
RD
114
I
Active high Manchester Encoded data received from the twisted pair.
RD
113
I
Active low Manchester Encoded data received from the twisted pair.
X1
127
I
20 MHz CRYSTAL INPUT:
This pin can be driven with an external MOS level
clock when X2 is left floating. This input provides the timing for all of the
82595FX functional blocks.
X2
128
O
20 MHz CRYSTAL OUTPUT:
If X1 is driven with an external MOS level clock,
X2 should be left floating.
2.6 Serial Interface LEDs
Symbol
Pin
No.
Type
Name and Function
AUI LED/BNC DIS
95
O
AUI LED INDICATOR:
This output, when the 82595FX is used as a
TPE/AUI solution, will turn on an LED when the 82595FX is actively
interfaced to its AUI serial port. When the 82595FX is used as a
BNC/AUI solution, this output becomes the
BNC DIS
output, which
can be used to power down the BNC Transceiver section (the
Transceiver and the DC to DC Converter) of the solution when the
BNC port is unconnected.
LILED
98
O
LINK INTEGRITY LED:
Normally on (low) ouput which indicates a
good link integrity status when the 82595FX is connected to an
active TPE port. This output will remain on when the Link Integrity
function has been disabled. It turns off (driven high) when Link
Integrity fails, or when the 82595FX is actively interfaced to an AUI
port. The minimum off time is 100 ms.
10
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