參數(shù)資料
型號(hào)： 80376
廠商： Intel Corp.
英文描述： 32-BIT Embedded Microprocessor(32位嵌入式微處理器)
中文描述： 32位嵌入式微處理器（32位嵌入式微處理器）
文件頁(yè)數(shù)： 13/95頁(yè)
文件大小： 1086K
代理商： 80376
376 EMBEDDED PROCESSOR
Combinations of these 3 components make up the 6
additional addressing modes. There is no perform-
ance penalty for using any of these addressing com-
binations, since the effective address calculation is
pipelined with the execution of other instructions.
The one exception is the simultaneous use of BASE
and INDEX components which requires one addi-
tional clock.
As shown in Figure 2.4, the effective address (EA) of
an operand is calculated according to the following
formula:
EA
e
BASE
Register
a
(INDEX
Register
c
scaling)
a
DISPLACEMENT
1. Direct Mode:
The operand’s offset is contained
as part of the instruction as an 8-, 16- or 32-bit
DISPLACEMENT.
2. Register Indirect Mode:
A BASE register con-
tains the address of the operand.
3. Based Mode:
A BASE register’s contents is add-
ed to a DISPLACEMENT to form the operand’s
offset.
4. Scaled Index Mode:
An INDEX register’s con-
tents is multiplied by a SCALING factor which is
added to a DISPLACEMENT to form the oper-
and’s offset.
5. Based Scaled Index Mode:
The contents of an
INDEX register is multiplied by a SCALING factor
and the result is added to the contents of a BASE
register to obtain the operand’s offset.
6. Based Scaled Index Mode with Displacement:
The contents of an INDEX register are multiplied
by a SCALING factor, and the result is added to
the contents of a BASE register and a DISPLACE-
MENT to form the operand’s offset.
240182–7
Figure 2.4. Addressing Mode Calculations
13
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