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參數(shù)資料
| 型號： | 80376 |
| 廠商： | Intel Corp. |
| 英文描述： | 32-BIT Embedded Microprocessor(32位嵌入式微處理器) |
| 中文描述： | 32位嵌入式微處理器（32位嵌入式微處理器） |
| 文件頁數(shù)： | 12/95頁 |
| 文件大小： | 1086K |
| 代理商： | 80376 |
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376 EMBEDDED PROCESSOR
Table 2.3. Segment Register Selection Rules
Type of
Implied (Default)
Segment Use
Segment Override
Prefixes Possible
Memory Reference
Code Fetch
CS
None
Destination of PUSH, PUSHF, INT,
CALL, PUSHA Instructions
SS
None
Source of POP, POPA, POPF, IRET,
RET Instructions
SS
None
Destination of STOS,
MOVS, REP STOS,
REP MOVS Instructions
(DI is Base Register)
ES
None
Other Data References,
with Effective Address
Using Base Register of:
[
EAX
]
[
EBX
]
[
ECX
]
[
EDX
]
[
ESI
]
[
EDI
]
[
EBP
]
[
ESP
]
DS
DS
DS
DS
DS
DS
SS
SS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
CS, SS, ES, FS, GS
2.4 Addressing Modes
The 80376 provides a total of 8 addressing modes
for instructions to specify operands. The addressing
modes are optimized to allow the efficient execution
of high level languages such as C and FORTRAN,
and they cover the vast majority of data references
needed by high-level languages.
Two of the addressing modes provide for instruc-
tions that operate on register or immediate oper-
ands:
Register Operand Mode:
The operand is located in
one of the 8-, 16- or 32-bit general registers.
Immediate Operand Mode:
The operand is includ-
ed in the instruction as part of the opcode.
The remaining 6 modes provide a mechanism for
specifying the effective address of an operand. The
linear address consists of two components: the seg-
ment base address and an effective address. The
effective address is calculated by summing any
combination of the following three address elements
(see Figure 2.3):
DISPLACEMENT:
an 8-, 16- or 32-bit immediate val-
ue following the instruction.
BASE:
The contents of any general purpose regis-
ter. The base registers are generally used by compil-
ers to point to the start of the local variable area.
Note that if the
Address Length Prefix
is used, only
BX and BP can be used as a BASE register.
INDEX:
The contents of any general purpose regis-
ter except for ESP. The index registers are used to
access the elements of an array, or a string of char-
acters. The index register’s value can be multiplied
by a scale factor, either 1, 2, 4 or 8. The scaled index
is especially useful for accessing arrays or struc-
tures. Note that if the
Address Length Prefix
is
used, no Scaling is available and only the registers
SI and DI can be used to INDEX.
12
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