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參數(shù)資料
| 型號： | 30044-23 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Low Power Integrated x86-Compatible with MMX Support 32-Bit Geode GXm Processor(低功耗集成兼容X86帶有MMX的32位 Geode GXm技術(shù)處理器) |
| 中文描述： | 32-BIT, 200 MHz, MICROPROCESSOR, CPGA320 |
| 封裝： | SPGA-320 |
| 文件頁數(shù)： | 40/244頁 |
| 文件大?。?/td> | 4496K |
| 代理商： | 30044-23 |
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40
Revision 3.1
Processor Programming (
Continued
)
G
3.3
The accessible registers in the processor are grouped into
three sets:
REGISTER SETS
1)
The
Application Register Set
contains the registers
frequently used by application programmers. Table 3-
2 shows the general purpose, segment, the instruc-
tion pointer and the EFLAGS Registers.
2)
The
System Register Set
contains the registers typi-
cally reserved for operating-systems programmers:
control, system address, debug, configuration, and
test registers.
3)
The
Model Specific Register (MSR) Set
is used to
monitor the performance of the processor or a
specific component within the processor. The model
specific register set has one 64-bit register called the
Time Stamp Counter.
Each of these register sets are discussed in detail in the
subsections that follow. Additional registers to support
integrated GXm processor subsystems are described in
Section 4.1 “Integrated Functions Programming Interface”
on page 92.
3.3.1
The Application Register Set consists of the registers most
often used by the applications programmer. These regis-
ters are generally accessible, although some bits in the
EFLAGS register are protected.
Application Register Set
The
General Purpose Register
contents are frequently
modified by instructions and typically contain arithmetic
and logical instruction operands.
In real mode,
Segment Registers
contain the base
address for each segment. In protected mode, the seg-
ment registers contain segment selectors. The segment
selectors provide indexing for tables (located in memory)
that contain the base address for each segment, as well
as other memory addressing information.
The
Instruction Pointer Register
points to the next
instruction that the processor will execute. This register is
automatically incremented by the processor as execution
progresses.
The
EFLAGS Register
contains control bits used to
reflect the status of previously executed instructions. This
register also contains control bits that affect the operation
of some instructions.
3.3.1.1
The General Purpose Registers are divided into four data
registers, two pointer registers, and two index registers as
shown in Table 3-2.
General Purpose Registers
The
Data Registers
are used by the applications pro-
grammer to manipulate data structures and to hold the
results of logical and arithmetic operations. Different por-
tions of general data registers can be addressed by using
different names.
An “E” prefix identifies the complete 32-bit register. An “X”
suffix without the “E” prefix identifies the lower 16 bits of
the register.
The lower two bytes of a data register are addressed with
an “H” suffix (identifies the upper byte) or an “L” suffix (iden-
tifies the lower byte). These _L and _H portions of the
data registers act as independent registers. For example,
if the AH register is written to by an instruction, the AL reg-
ister bits remain unchanged.
The
Pointer and Index Registers
are listed below.
SI or ESI
DI or EDI
SP or ESP
BP or EBP
Source Index
Destination Index
Stack Pointer
Base Pointer
These registers can be addressed as 16- or 32-bit registers,
with the “E” prefix indicating 32 bits. The pointer and index
registers can be used as general purpose registers; how-
ever, some instructions use a fixed assignment of these
registers. For example, repeated string operations always
use ESI as the source pointer, EDI as the destination
pointer, and ECX as a counter. The instructions that use
fixed registers include multiply and divide, I/O access,
string operations, stack operations, loop, variable shift and
rotate, and translate instructions.
The GXm processor implements a stack using the ESP
register. This stack is accessed during the PUSH and
POP instructions, procedure calls, procedure returns,
interrupts, exceptions, and interrupt/exception returns.
The GXm processor automatically adjusts the value of the
ESP during operations that result from these instructions.
The EBP register may be used to refer to data passed on
the stack during procedure calls. Local data may also be
placed on the stack and accessed with BP. This register
provides a mechanism to access tack data in high-level
languages.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 3004430 | 功能描述:DIN導(dǎo)軌式接線端子 UK 5-MTK RoHS:否 制造商:Phoenix Contact 類型:Feed Through Modular Terminal Block 位置/觸點數(shù)量:1 線規(guī)量程:26-14 電流額定值:5 A, 15 A 電壓額定值:300 V, 600 V 安裝風(fēng)格: 端接類型:Push-In |
| 30044-44L | 制造商:LENOX 功能描述:HOLE SAW BI-METAL 70MM |
| 3004472 | 制造商:Phoenix Contact 功能描述:UK 5-HESI (5X20) |
| 300448 | 功能描述:手工工具 RETAINING PIN RoHS:否 制造商:Molex 產(chǎn)品:Extraction Tools 類型: 描述/功能:Extraction tool |
| 300449 | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:HAND TOOL ASSEMBLY |
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