1.8 Volt Intel
Wireless Flash Memory
with 3 Volt I/O and SRAM (W30)
28F6408W30, 28F3204W30, 28F320W30, 28F640W30
Preliminary Datasheet
Product Features
The 1.8 Volt Intel
Wireless Flash Memory with 3 Volt I/O combines state-of-the-art Intel
Flash technology with
low power SRAM to provide the most versatile and compact memory solution for high performance, low power,
board constraint memory applications.
The 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O offers a multi-partition, dual-operation flash
architecture that enables the device to read from one partition while programming or erasing in another partition.
This Read-While-Write or Read-While-Erase capability makes it possible to achieve higher data throughput rates
as compared to single partition devices and it allows two processors to interleave code execution because
program and erase operations can now occur as background processes.
The 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O incorporates a new Enhanced Factory Programming
(EFP) mode to improve 12 V factory programming performance. This new feature helps eliminate manufacturing
bottlenecks associated with programming high density flash devices. Compare the EFP program time of 3.5 μs
per word to the standard factory program time of 8.0 μs per word and save significant factory programming time
for improved factory efficiency.
Additionally, the
1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O includes block lock-down, programmable
WAIT signal polarity and is supported by an array of software tools. All these features make this product a perfect
solution for any demanding memory application.
I
Flash Performance
—
70 ns Initial Access Speed
—
25 ns Page-Mode Read Speed
—
20 ns Burst-Mode Read Speed
—
Burst and Page Mode in All Blocks and
across All Partition Boundaries
—
Enhanced Factory Programming:
3.5 μs per Word Program Time
—
Programmable WAIT Signal Polarity
I
Flash Power
—
V
CC
= 1.70 V
–
1.90 V
—
V
= 2.20 V
–
3.30 V
—
Standby Current = 6 μA (typ.)
—
Read Current = 7 mA
(4 word burst, typ.)
I
Flash Software
—
5/9 μs (typ.) Program/Erase Suspend Latency
Time
—
Intel
Flash Data Integrator (FDI) and
Common Flash Interface (CFI) Compatible
I
Quality and Reliability
—
Operating Temperature:
–
25
°
C to +85
°
C
—
100K Minimum Erase Cycles
—
0.18 μm ETOX
VII Process
I
Flash Architecture
—
Multiple 4-Mbit Partitions
—
Dual Operation: RWW or RWE
—
Parameter Block Size = 4-Kword
—
Main block size = 32-Kword
—
Top and Bottom Parameter Devices
I
Flash Security
—
128-bit Protection Register: 64 Unique Device
Identifier Bits; 64 User OTP Protection
Register Bits
—
Absolute Write Protection with V
at Ground
—
Program and Erase Lockout during Power
Transitions
—
Individual and Instantaneous Block Locking/
Unlocking with Lock-Down
I
SRAM
—
70 ns Access Speed
—
16-bit Data Bus
—
Low Voltage Data Retention
—
S-V
= 2.20 V
–
3.30 V
I
Density and Packaging
—
32-Mbit Discrete in VF BGA Package
—
64-Mbit Discrete in μBGA* Package
—
56 Active Ball Matrix, 0.75 mm Ball-Pitch in
μBGA* and VF BGA Packages
—
32/4-, 64/8- and 128/TBD- Mbit (Flash +
SRAM) in a 80-Ball Stacked-CSP Package (14
mm x 8 mm)
—
16-bit Data Bus
290702-002
March 2001
Notice:
This document contains preliminary information on new products in production. The
specifications are subject to change without notice. Verify with your local Intel sales office that
you have the latest datasheet before finalizing a design.