參數(shù)資料
型號(hào): ZR36504
廠商: Electronic Theatre Controls, Inc.
英文描述: Video & Audio Interface solution via USB
中文描述: 視頻
文件頁(yè)數(shù): 48/74頁(yè)
文件大小: 298K
代理商: ZR36504
ZORAN Corporation
USBvision II Data Decoder
ZR36505 Data Sheet
November-99
Page 48 of 48
2
3
4
5
IIC LRACK
IIC LRNACK
CAM1
CAM2
IICC with Last Byte Read Acknowledged
IICC with Last Byte Read Not Acknowledged
Camera 1 - refer to timing diagram
Camera 2 - refer to timing diagram
Modes number 1-5 are referred as Automatic modes: In these modes the host computer
only needs to write the data bytes (and the device address byte - in some of them) in certain
registers (SER_DAT1 to SER_DAT4, and SER_ADRS) and initiate a transfer request; in a
similar way the host computer can read received data from same registers.
The SER_MODE register has some specific bits that can turn the automatic modes into
more flexible serial data formats. These register bits are:
CLK_RATE: Writing '0' to this bit will select a 93.75KHz clock at IICCK output.
Writing '1' to this bit will select a 1.5MHz clock at IICCK output.
CLK_POL:
Writing '0' to this bit will select the normal polarity at IICCK output.
Writing '1' to this bit will select an inverted polarity at IICCK output.
VSYNC:
Writing '0' to this bit will select an immediate transfer.
Writing '1' to this bit will delay start-of-transfer to camera blank
period.
Another register that is used by the automatic modes is the SER_CONT register. This
register is used by the host computer to control the serial port machine. The SER_CONT
register consists of the following control bits:
SER_LEN:
This field contains a 3-bits binary integer that specify the number of
data bytes that the host wishes to transfer in the serial transaction (the
address byte is not counted). The range of this parameter is 0 to 4.
SER_DIR:
Writing '0' to this bit selects a Write operation (host to camera).
Writing '1' to this bit selects a Read operation (camera to host).
SER_GO/SER_BUSY: This is used as both a command and a status bit. Writing '1' to
this bit will initiate a serial transfer request. The serial transfer will
either start immediately, or wait until the vertical blank time interval is
detected at the camera video signal (depends on VSYNC bit). The
SER_GO/SER_BUSY bit will remain '1' till the end of transaction, to
indicate to the host computer when a new transaction can be initiated.
NACK_RCV: This is a Read-Only bit, and it is used in modes 2 and 3 only (IICC
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