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參數(shù)資料
| 型號(hào)： | ZR36504 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Video & Audio Interface solution via USB |
| 中文描述： | 視頻 |
| 文件頁數(shù)： | 39/74頁 |
| 文件大?。?/td> | 298K |
| 代理商： | ZR36504 |
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ZORAN Corporation
USBvision II Data Decoder
ZR36505 Data Sheet
November-99
Page 39 of 39
The size of the Video Buffer is set by the host computer via the DRAM registers. Depending
on USB bandwidth and output frame size and rate, this buffer may become full in the middle
of a video streaming. In this case, additional frames will be dropped out by the ZR36504,
until enough free space is available in buffer. When operating in the Compressed mode, the
host computer can alter the compression rate by modifying some threshold registers on the
fly; in this way it can prevent most of the "buffer-full" events, which results in a stable frame-
rate (that is to say, frames are not dropped). To enable the host computer to monitor the
status of the Video Buffer and control frame-dropping, the ZR36504 provides the following
registers:
Parameter
Register
address
BUF_THR [9..0]
Reg.48/d7-d0
Reg.49/d4-d3
remaining buffer space is less than the value in this
register. The host computer sets this register
according to the maximum space that a video frame
may occupy.
VID_BUF_LEFT
[9..0]
Reg.65/d1-d0
computer can prevent "Buffer-Full" occurrence by
monitoring this register and changing compression
thresholds.
LFP [19..0]
Reg.63/d7-d0
Reg.64/d6-d0
Reg.65/d3-d2
rate by monitoring this register from time to time.
Special Video Control bits
The ZR36504 has two special bits in the VIN_REG2 register, which can alter the input
video sequence. These bits are normally used during still capture operation, and are
specified in the following table:
Parameter
Register
address
SEND_FID
Reg.28/d5
VIN_REG2
from an Interlace camera.
0: Default value.
1: FID bit overrides bit 0 of Frame_Phase[4..0].
KEEP_BLANK
Reg.28/d7
VIN_REG2
take care to switch this bit from '0' to '1' during a true
blank position.
0: Default value.
Usage
Minimum remaining buffer space to begin frame
dropping (units are in 2KB). "Buffer-Full" occurs when
Reg.62/d7-d0
This is a Read-Only register that provides the actual
remaining buffer space (units are in 2KB). The host
This is a Read-Only register that provides the DRAM
address for data write in the Video Buffer at the end of
every video-frame (units are in 16-byte). The host
computer can keep track of the current compression
Usage
Send FID information in frame header data. The FID
information is used for reconstructing a 2-field frame
Force a "blank" position on the input video frame
source, and drop new frames. Software driver should
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