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參數(shù)資料
| 型號： | ZR36016 |
| 廠商： | Zoran Corporation |
| 英文描述： | JPEG Pre- and Post-Processor(JPEG 先-后處理器) |
| 中文描述： | JPEG格式前和后處理器（JPEG格式先-后處理器） |
| 文件頁數(shù)： | 20/36頁 |
| 文件大?。?/td> | 228K |
| 代理商： | ZR36016 |
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20
Integrated Color Space / Raster-To-Block Converter
When the last pixel of the PAX portion of the last buffer line is
output on the PXOUT bus, a check is made to see if the next
buffer has been loaded from the ZR36050 (8 or 16 lines if
RSTR = 0 or one line if RSTR = 1). If it has not been loaded, then
CBSY
is asserted.
Figure 28 shows the condition when
CBSY
is asserted but the
line is not ignored. However, if
CBSY
is asserted at the time HIN
rises, the expansion process on the next line is ignored and the
image data coming from PXIN is output from PXOUT instead.
Strip Buffer And Sub-Buffer
The external strip buffer memory is used for the raster-to-block
and block-to-raster conversions. Double buffering is used for the
8 or 16 lines per block or a single line for raster-to-raster conver-
sion. The memory is typically composed of two physical 8-bit-
wide memories organized as shown in Figure 29. A/B and A’/B’
are the two strip buffers. Reading and writing are always done
with 16-bit accesses. The switch between reading and writing
takes place at the SYSCLK rate. The sub-buffer allows continu-
ous pixel data flow while the ZR36050-side buffer is being
accessed.
Buffer selection point
MWE
PAX
CBSY
MOE
DSYNC
Pixel side buffer is always monitored
Check if all contents of pixel
side buffer have been entered
Check if all contents of coder side
buffer have been read out
Delay of internal processing
Figure 27. Normal Expansion Operation When CBSY is Not Asserted
BDATA
63
64
1
2
3
4
5
6
36
61
62
63
64
1
28 SYSCLK
PXOUT
Delay of internal processing
STOP
HIN
PXIN
MWE
Figure 28. Expansion Operation When CBSY is Asserted
but the Line is Not Ignored
NAX
PAX
CBSY
MOE
DSYNC
Delay of internal processing
Pixel side buffer is always monitored
Check if all contents of pixel
side buffer have been entered
Check if all contents of coder side
buffer have been read out
Delay of
Buffer
Size of External Strip Memory
The minimum required size in bytes of the strip memory for each
format is:
Size = 2 x K x L x PAX x D bytes
where values of K and L are determined from Table 17. D = 1
when HORZ = 0 and D = 0.5 when HORZ = 1. D = 1 always for
the 4:1:1 (H2V2) format. When RSTR = 1, L = 1 in any format.
1. K = 2 when HORZ = 1.
Table 17: Calculation Parameters For Strip Memory
Coef
ZR36050 Image Format
1:0:0
4:2:2
4:1:1
(H2V2)
4:1:1
(H4V1)
1.5
[1]
4:4:4
4:4:4:4
K
1
2
1.5
3
4
L
8
8
16
8
8
8
Figure 29. Strip Buffer Interface
ZR36016
PXIN/PXOUT
16
Sub-Buffer
16
16
ZR36050
16
A
A’
Unused
B
B’
Address
8
8
SRAM A
SRAM B
0
High
相關PDF資料 |
PDF描述 |
|---|---|
| ZR36050 | JPEG Image Compression Processor(JPEG 圖象壓縮處理器) |
| ZR36060 | Integrated JPEG Codec(集成JPEG編解碼器) |
| ZR36060 | Circular Connector; No. of Contacts:19; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:14; Circular Contact Gender:Socket; Circular Shell Style:Cable Receptacle; Insert Arrangement:14-19 |
| ZR36060PQC | Integrated JPEG CODEC |
| ZR36067 | AV PCI CONTROLLER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ZR36016PQC | 制造商:ZORAN 功能描述: |
| ZR36016PQC-30 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:INTEGRATED COLOR SPACE / RASTER-TO-BLOCK CONVERTER |
| ZR36050 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:JPEG IMAGE COMPRESSION PROCESSOR |
| ZR36050PQC-21 | 制造商:ZORAN 功能描述: |
| ZR36050PQC27 | 制造商:ZORAN 功能描述:* |
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