參數(shù)資料
型號: ZR36016
廠商: Zoran Corporation
英文描述: JPEG Pre- and Post-Processor(JPEG 先-后處理器)
中文描述: JPEG格式前和后處理器(JPEG格式先-后處理器)
文件頁數(shù): 19/36頁
文件大小: 228K
代理商: ZR36016
19
Integrated Color Space / Raster-To-Block Converter
During expansion FBSY goes high when the first DSYNC pulse
from the ZR36050 is detected and goes low after the active
window has been processed. WINDOW is active whenever data
in the active window is being output, and when it is not active the
PXIN image data is passed through to the PXOUT bus. These
are illustrated below.
CBSY Timing
showing the state of transfers between the ZR36016 strip
buffers and the ZR36050. It indicates that the strip buffer on the
ZR36050 side is still busy when the strip buffer on the pixel side
becomes available and the buffers can not be exchanged. If the
buffer exchange does not occur before the rising edge of HIN,
the data of that line will be lost during compression, and during
expansion the line will not contain expanded data and PXIN data
will be substituted.
If CBSY becomes active but is then cleared when the ZR36050-
side strip buffer becomes ready, normal operation will continue
on the next rising edge of HIN. However if PAX < 24 then there
must be 16 clock periods of PXCLK before the rising edge of HIN
to insure normal operation.
CBSY Timing On Compression
After the last pixel of the PAX portion of the last buffer line has
been input on PXIN and sent to the strip buffer, a check is made
to see that the previous buffer has been completely read out to
the ZR36050. If it has not, then
CBSY
is asserted. Figure 24
shows a case where the previous buffer is ready immediately
and
CBSY
is not asserted.
VIN
LINE
EOS
Figure 23. GO/STOP and START Timing
for Compression and Expansion
Input GO or START
Compression
FSBY
A
NAY
PAY
CBSY
WINDOW
Expansion
FSBY
CBSY
WINDOW
First DSYNC
Figure 25 shows the condition where
CBSY
is asserted but the
line is not ignored.
Figure 26 shows the case where
CBSY
is asserted and a line is
ignored.
CBSY
becomes active on line 8n. Processing of line 8n
is completed in the ZR36016 and line 8n+1 will be ignored. At
the next rising edge of HIN, if
CBSY
is not asserted, the process-
ing is restarted (with line 8n+2).
CBSY Timing On Expansion
CBSY
is asserted immediately after GO/STOP is set and
CMPR = 0. It remains asserted while the ZR36050 is filling the
first buffer and PXIN data is being output on the PXOUT bus.
Normal operation then proceeds as shown in Figure 27 where
CBSY
is not asserted.
HIN
PXIN
MWE
Figure 24. Normal Compression Operation when
CBSY is Not Asserted
NAX
PAX
CBSY
MOE
DSYNC
Delay of internal processing
pixel side buffer is always monitored
Check if all contents of pixel
side buffer have been entered
Buffer
selection point
Check if all contents of coder side
buffer have been read out
Last line of strip being input
Buffer
selection point
HIN
PXIN
MWE
Figure 25. Compression Operation When CBSY is Asserted
but the Line is not Ignored
NAX
PAX
CBSY
MOE
DSYNC
Delay of internal processing
Pixel side buffer is always monitored
Check if all contents of pixel
side buffer have been entered
Check if all contents of coder side
buffer have been read out
Last line of strip being input
Delay of internal processing
Buffer selection point
HIN
PXIN
MWE
Figure 26. Compression Operation when CBSY is
Asserted and A Line is Ignored
NAX
PAX
CBSY
MOE
DSYNC
Pixel side buffer is always monitored
Check if all contents of pixel
side buffer have been entered
Check if all contents of coder side
buffer have been read out
Delay of internal processing
NAX
PAX
PAX
8n
8n+1
8n+2
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相關代理商/技術參數(shù)
參數(shù)描述
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ZR36050PQC-21 制造商:ZORAN 功能描述:
ZR36050PQC27 制造商:ZORAN 功能描述:*