參數(shù)資料
型號: ZL50418GKC
廠商: Zarlink Semiconductor Inc.
英文描述: Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
中文描述: 管理16端口10/100平方米端口1個G以太網(wǎng)交換機
文件頁數(shù): 25/163頁
文件大?。?/td> 2122K
代理商: ZL50418GKC
ZL50418
Data Sheet
25
Zarlink Semiconductor Inc.
Each VIX represents the mapping result from the associated VLAN ID (VLANID = 0x004 is mapped to VIX4).
Unused VLAN ID’s have their corresponding VIX programmed to hexadecimal 00. Used VLAN ID’s have Their
corresponding VIX programmed to hexadecimal 01 through FF. In other words, 255 VLAN’s are supported. The VIX
value is a pointer to the entries in the VLAN Index port association table (internal memory).
The VLAN Index port association table is used by both software and hardware. It contains 256 entries. Each entry
has 19 fields, such that each field represents the port status of that particular VLAN.
Table 3 - VLAN Index Port Association Table
Each entry has 64 bits. Each port has a VLAN status field with the following two bits values:
- 00: Port not a member of VLAN
- 01: Port is a member of VLAN, and is subject to aging (Do not use. Used by the aging module)
- 10: Port is a member of VLAN, and is subject to aging
- 11: Port is a member of VLAN, and is not subject to aging
Note:
The VLAN aging time is controlled by register 402h.
5.4 MAC Address Filtering
The ZL50418's implementation of intelligent traffic switching provides filters for source and destination MAC
addresses. This feature filters unnecessary traffic, thereby providing intelligent control over traffic flows and
broadcast traffic.
MAC address filtering allows the ZL50418 to block an incoming packet to an interface when it sees a specified MAC
address in either the source address or destination address of the incoming packet. For example, if your network is
congested because of high utilization from a MAC address, you can filter all traffic transmitted from that address
and restore network flow, while you troubleshoot the problem.
VIX7
VIX6
VIX5
VIX4
VIX3
VIX2
VIX1
VIX0
VIX4095
VIX4094
VIX4093
VIX4092
VIX4091
VIX4090
VIX4089
VIX4088
Table 2 - VLAN Index Mapping Table
Port
Not Used
G1
G0
CPU
P15
P14
……
P3
P2
P1
P0
Bit
63 to 54
53 52
51 50
49 48
31 30
29 28
7 6
5 4
3 2
1 0
E
N
T
R
I
E
S
0
1
:
:
255
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