參數(shù)資料
型號: ZL30109QDG1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: DS1/E1 System Synchronizer with
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP64
封裝: 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64
文件頁數(shù): 15/37頁
文件大?。?/td> 751K
代理商: ZL30109QDG1
ZL30109
Data Sheet
15
Zarlink Semiconductor Inc.
Figure 8 - Timing Diagram of Hitless Mode Switching
Examples:
HMS=1
: When 10 Normal to Holdover to Normal mode transitions occur and in each case the Holdover mode was
entered for 2 seconds, then the accumulated phase change (MTIE) could be as large as 3.13
μ
s.
-
Phase
holdover_drift
= 0.15 ppm x 2 s = 300 ns
Phase
mode_change
= 0 ns + 13 ns = 13 ns
Phase
10 changes
= 10 x (300 ns + 13 ns) = 3.13
μ
s
where:
-
-
-
0.15 ppm is the accuracy of the Holdover mode
-
0 ns is the maximum phase discontinuity in the transition from the Normal mode to the Holdover mode
-
13 ns is the maximum phase discontinuity in the transition from the Holdover mode to the Normal mode
when a new TIE corrector value is calculated.
REF
Phase drift in Holdover mode
HMS = 0
Normal mode
Return to Normal mode
REF
Output
Clock
REF
Output
Clock
REF
Output
Clock
Phase drift in Holdover mode
Normal mode
Return to Normal mode
Output
Clock
REF
Output
Clock
REF
Output
Clock
HMS = 1
TIE_CLR=0
REF
Output
Clock
TIE_CLR=0
REF
Output
Clock
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參數(shù)描述
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