參數(shù)資料
型號： ZL30105QDG1
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110
中文描述： SPECIALTY TELECOM CIRCUIT, PQFP64
封裝： 10 X 10 MM, 1 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64
文件頁數(shù)： 27/52頁
文件大?。?/td> 1097K
代理商： ZL30105QDG1
ZL30105
Data Sheet
27
Zarlink Semiconductor Inc.
Figure 17 - Automatic Reference Switching - Out-of-Range Reference Failure
4.6 Clock Redundancy Support
In general, clock redundancy implies that the redundant timing card DPLL tracks the output clock and/or frame
pulse of the active timing card DPLL. In case that the active timing card fails, the devices that use the active clock
and/or frame pulse must be able to switch to the redundant clock and/or frame pulse without experiencing
disruptions. Therefore the redundant signals must closely track the active signals. The ZL30105 supports this kind
of clock redundancy in various ways;
Lock only to the active clock. The ZL30105 uses the 922 Hz loop filter bandwidth to closely track the active
clock, even in the presence of jitter on the active clock. However the active and redundant frame pulse may
not be aligned.
Lock to the active frame pulse. Both the redundant clock and frame pulse will be aligned with the active clock
and frame pulse. However the ZL30105 loop filter bandwidth is limited to 14 Hz (2 kHz active frame pulse) or
58 Hz (8 kHz active frame pulse). Therefore the redundant clock and frame pulse will not track the active
frame pulse as closely in the presence of jitter on the active frame pulse as with a 922 Hz loop filter
bandwidth.
Lock to both the active clock and associated frame pulse. The ZL30105 uses the 922 Hz loop filter
bandwidth and thereby track the active clock and frame pulse in the presence of jitter on the active signals. It
will also align the redundant frame pulse with the active frame pulse.
The method of clock redundancy shown in Figure 19 is that the redundant timing card is frequency and phase
locked to the active clock and frame pulse. The redundant card is configured as Secondary Master (SEC_MSTR=1)
and continuously adjusts the phase of its output clocks and frame pulses to match that of the active clock and frame
pulse. In this mode of operation, the bandwidth of the redundant timing card’s DPLL is much larger than that of the
active timing card’s DPLL, 922 Hz versus 1.8 Hz. Therefore the redundant clocks and frame pulses will track the
active clock and frame pulse closely even in the presence of the maximum tolerable input jitter and wander on the
active timing card’s reference input.
10 to 20 s
REF0
REF_FAIL0
HOLDOVER
REF_OOR0
(internal signal)
REF1
REF0
REF_SEL
Frequency Precision failure
LOCK
Note: This scenario is based on REF1 remaining good throughout the duration.
LOCK pin behaviour depends on phase and frequency offset of REF1.
Lock Time
相關(guān)PDF資料
PDF描述
ZL30105 Power Clamp On Multimeter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Approval Categories:CAT III 600V; Calibrated:No; Current Measuring Range:0-400.0A; Current Setting AC:400A RoHS Compliant: NA
ZL30105QDG Digital Clamp-On Meter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Calibrated:No; Current Setting AC:1000A; Resistance Measuring Range:400 Ohm to 10 MOhm; Voltage Measuring Range AC:600V RoHS Compliant: NA
ZL30106QDG1 SONET/SDH/PDH Network Interface DPLL
ZL30106 SONET/SDH/PDH Network Interface DPLL
ZL30106QDG SONET/SDH/PDH Network Interface DPLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL30106 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH/PDH Network Interface DPLL
ZL30106_05 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH/PDH Network Interface DPLL
ZL30106QDG 制造商:Zarlink Semiconductor Inc 功能描述:SONET/SDH/PDH NETWORK INTRFC 64TQFP - Trays 制造商:Microsemi 功能描述:Microsemi ZL30106QDG Communication Misc
ZL30106QDG1 制造商:Zarlink Semiconductor Inc 功能描述:SONET/SDH/PDH NETWORK INTRFC 64TQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE SONET/SDH/PDH NTWK INTERFACEDPLL
ZL30107 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:GbE Line Card Synchronizer
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